# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) # DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) # # TS_TRIG_TYPE 1 - Internal Pulser # 2 - External FP # 4 - GTP # 6 - GTP + External # # # TS_FP_INPUTS - List of enabled FP inputs # # # TS_SOFT_TRIG # Trigger type (type 1 or 2 for playback) # Number of events to trigger # Period multiplier (depends on range 0-0x7FFF) # Range 1 - min 120ns, increments of 30ns up to 983.13u # 2 - min 120ns, increments of 30.72us up to 1.007s # # # TI_MASTER 1 - Stand alone with master TI # # TI_MASTER_TRIG 1 - soft, 2 - external pulser, 3 - playback # # TI_SOFT_TRIG # Trigger type (type 1 or 2 for playback) # Number of events to trigger # Period multiplier (depends on range 0-0x7FFF) # Range 1 - min 120ns, increments of 30ns up to 983.13u # 2 - min 120ns, increments of 30.72us up to 1.007s # # F1TDC_CLOCK 0 <- Clock Source (0 = Internal 32 MHz) # (1 = External 31.25 MHz) # F1TDC_VERSION 2 <- Module Version (2 = High Resolution, synchronous, 32 channels) # (3 = Normal Resolution, synchronous, 48 channels) # set bin size from 0.056 to 0.058 -> Beni! # F1TDC_BIN_SIZE 0.058 <- Bin size (ns) # F1TDC_LATENCY 3000.0 <- Trigger latency (ns) # F1TDC_WINDOW 1000.0 <- Trigger window (ns) ========================== TRIGGER ========================== #CALIBRATION 1 TS_TRIG_TYPE 2 TS_FP_INPUTS 3 TS_SOFT_TRIG 1 64000 0x1FFF 1 #TS_TD_SLOTS 3 4 5 6 7 8 9 10 14 TS_TD_SLOTS 10 9 14 # TS_FP_DELAY 3 427 # TS_FP_DELAY 3 480 TS_FP_DELAY 3 500 # SSP SLOT FIBER_EN SUM_ENABLE SSP_SLOT 9 0x3F 1 SSP_SLOT 10 0x3F 1 # TYPE DELAY INT_WIDTH ENABLE TRIG_EQ PS 20 10 0 TRIG_EQ BCAL_E 20 10 0 TRIG_EQ BCAL_C 20 10 0 TRIG_EQ FCAL 20 10 1 TRIG_EQ ST 20 10 0 TRIG_EQ TOF 20 10 0 # TYPE LATENCY WIDTH FCAL_E BCAL_E EN_THR NHIT LANE TRIG_TYPE PS 420 20 1300 1900 1100 0 -1 TRIG_TYPE BFCAL 440 20 1 0 2000 0 -1 TRIG_TYPE BFCAL 440 20 1 0 1500 0 -1 TRIG_TYPE BFCAL 440 20 1 0 1500 0 0 TRIG_TYPE BCAL_COS 440 40 1500 2100 1300 0 -1 TS_GTP_PRES 0 1 TRIG_DELAY 0 DAC_CALIB 0 # TEST 2, THR = 3 TS_TRIG_HOLD 1 10 0 TS_TRIG_HOLD 2 127 0 TS_TRIG_HOLD 4 40 0 TS_TRIG_HOLD 3 2 1 TI_FIBER_LATENCY_OFFSET 0x98 TI_MASTER 0 TI_MASTER_TRIG 1 TI_FP_INPUTS 3 # TI_SOFT_TRIG 1 10000 0x7FFF 1 TI_SOFT_TRIG 1 10000 0x600 1 TI_FIBER_EN BLOCKLEVEL 40 BUFFERLEVEL 4 ========================== GLOBAL ========================== F1TDC_BIN_SIZE 0.058 FADC250_BUSY 3 FADC125_BUSY 3 FADC250_FORMAT 2 FADC125_FORMAT 1 ========================== FCAL ========================== FADC250_MODE 9 FADC250_W_OFFSET 850 # FADC250_W_OFFSET 400 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 20 FADC250_NPEAK 1 FADC250_READ_THR 108 #FADC250_READ_THR 150 #FADC250_READ_THR 125 FADC250_TRIG_BL 100 #FADC250_TRIG_THR 200 FADC250_TRIG_THR 165 #FADC250_TRIG_THR 100 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 10 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default #FADC250_COM_DIR /gluex/CALIB/ALL/fadc250 #FADC250_COM_VER Run_2661 #FADC250_USER_DIR /home/somov/setups/tagh/parms/common/user #FADC250_USER_VER beam FADC250_USER_DIR /gluonfs1/gluex/Subsystems/FCAL/FCAL_Analysis/DAQ/config/spring_2015 FADC250_USER_VER spring2015v2 #FADC250_USER_VER beamManny ========================== BCAL ========================== # change offset from 905 to 885 -> Beni 6.10.2014 afternoon # also change NSB and NSA from 3/6 to 5/40 FADC250_MODE 8 FADC250_W_OFFSET 825 FADC250_W_WIDTH 100 FADC250_NSB 5 # Dalton: increased NSA from 40 FADC250_NSA 55 FADC250_NPEAK 1 # MMD threshold from 110 to 105 (2014-12-05) FADC250_READ_THR 105 #FADC250_READ_THR 120 FADC250_TRIG_BL 100 FADC250_TRIG_THR 120 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250 #FADC250_COM_VER Run_1270 FADC250_COM_VER Run_1649 #FADC250_COM_VER Run_1762 FADC250_USER_DIR /gluex/CALIB/ALL/user FADC250_USER_VER SF1 #CTP_BCAL_THR 56000 #CTP_THR 10 # F1 TDC #change latency from 900. to 3540. and window from 500 to 1000 ->Beni F1TDC_WINDOW 1000. F1TDC_LATENCY 3400. # set bin size from 0.056 to 0.058 -> Beni! #F1TDC_BIN_SIZE 0.058 F1TDC_CLOCK 1 # LE discriminator DSC2_WIDTH 40 40 DSC2_THRESHOLD 35 50 ========================== ST ========================== #change latency to 925 by BENI # also change NSA and NSB from 3/6 to 5/20 FADC250_MODE 8 FADC250_W_OFFSET 824 FADC250_W_WIDTH 100 FADC250_NSB 5 FADC250_NSA 20 FADC250_NPEAK 1 # change FADC250_READ_THR from 800 -> 110 by pooser (5 mV) # change FADC250_READ_THR from 110 -> 120 by pooser (10 mV) FADC250_READ_THR 120 FADC250_TRIG_BL 100 FADC250_TRIG_THR 150 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250 FADC250_COM_VER Run_1270 FADC250_USER_DIR /home/ FADC250_USER_VER # F1 TDC # change latency from 2100 to 3700 F1TDC_WINDOW 1000. F1TDC_LATENCY 3460. # set bin size from 0.056 to 0.058 -> Beni! #F1TDC_BIN_SIZE 0.058 F1TDC_CLOCK 1 # LE discriminator # change DSC2_THRESHOLD from 100 -> 50 by pooser DSC2_WIDTH 40 40 DSC2_THRESHOLD 50 60 ========================== TOF ========================== # change latency and width from 510/200 to 910/100 # and change NSB and NSA from 3/6 to 5/20 # btw. it is BENI # changed NSB & NSA from 5/20 to 10/45 (eugenio) FADC250_MODE 8 FADC250_W_OFFSET 810 FADC250_W_WIDTH 100 FADC250_NSB 10 FADC250_NSA 45 FADC250_NPEAK 1 FADC250_READ_THR 210 FADC250_TRIG_BL 200 FADC250_TRIG_THR 210 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 FADC250_COM_DIR /gluex/Subsystems/TOF/parms/common/fadc250 FADC250_COM_VER ver1 #FADC250_COM_DIR /gluex/CALIB/ALL/fadc250 #FADC250_COM_VER Run_1270 FADC250_USER_DIR /home/ FADC250_USER_VER CTP_BCAL_THR 56000 # LE discriminator DSC2_WIDTH 20 40 DSC2_THRESHOLD 30 50 # CAEN 1290 #TDC1290_W_WIDTH 750 TDC1290_W_WIDTH 3800 #TDC1290_W_OFFSET -1750 #TDC1290_W_OFFSET -3640 TDC1290_W_OFFSET -3660 TDC1290_W_EXTRA 25 TDC1290_W_REJECT 50 TDC1290_BLT_EVENTS 1 TDC1290_N_HITS 64 TDC1290_ALMOSTFULL 16384 TDC1290_OUT_PROG 2 TDC1290_A24_A32 2 TDC1290_SNGL_BLT 3 TDC1290_SST_RATE 0 TDC1290_BERR_FIFO 1 TDC1290_EDGE 2 ========================== CDC ========================== #Normal Running FADC125_MODE 8 FADC125_W_OFFSET 450 FADC125_W_WIDTH 180 FADC125_NSB 5 FADC125_NSA 80 FADC125_NPEAK 1 FADC125_THR 70 FADC125_DAC 800 FADC125_F_REV 0x0219 FADC125_B_REV 0x0908 FADC125_P_REV 0x0908 FADC125_TYPE 0xf125 #FADC125_COM_DIR /gluex/release/0.1/cdc/parms/common/fadc125 #FADC125_COM_VER ver1 #FADC125_COM_DIR /gluex/CALIB/ALL/fadc125 #FADC125_COM_VER Run_1070 FADC125_COM_DIR /gluex/CALIB/CDC/HVTScan FADC125_COM_VER ver1 FADC125_USER_DIR /gluex/ FADC125_USER_VER ========================== FDC ========================== FADC125_MODE 8 FADC125_W_OFFSET 430 FADC125_W_WIDTH 100 FADC125_NSB 3 FADC125_NSA 40 FADC125_NPEAK 1 FADC125_THR 70 FADC125_DAC 800 #FADC125_COM_DIR /home/somov/setups/cdc_ts/parms/common/fadc125 #FADC125_COM_VER ver1 FADC125_COM_DIR /gluex/CALIB/ALL/fadc125 #FADC125_COM_VER Run_1070 FADC125_COM_VER Run_1269 FADC125_USER_DIR /home/ FADC125_USER_VER # F1 TDC # change latency and window back to what we expect from ADCs (Beni) F1TDC_WINDOW 1400. F1TDC_LATENCY 3560. #F1TDC_BIN_SIZE 0.112 # High-resolution board in slot 17 # changed by Beni (loser) 2014.10.6 F1TDC_HR_WINDOW 1000. F1TDC_HR_LATENCY 1160. # set bin size from 0.056 to 0.058 -> Beni! #F1TDC_HR_BIN_SIZE 0.058 F1TDC_CLOCK 1 ========================== TAGM ========================== FADC250_MODE 8 #FADC250_W_OFFSET 895 FADC250_W_OFFSET 905 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 1 # For low gain mode FADC250_READ_THR 115 # For high gain mode #FADC250_READ_THR 180 FADC250_TRIG_BL 100 FADC250_TRIG_THR 210 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 #FADC250_COM_DIR /gluex/release/0.1/tagm/parms/common/fadc250 #FADC250_COM_VER ver1 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250 #FADC250_COM_VER Run_1270 FADC250_COM_VER Run_1905 FADC250_USER_DIR /home/ FADC250_USER_VER CTP_USE 0 # F1 TDC F1TDC_WINDOW 600. F1TDC_LATENCY 3600. #F1TDC_BIN_SIZE 0.056 F1TDC_CLOCK 1 # LE discriminator # Change for high gain mode DSC2_WIDTH 40 40 #DSC2_THRESHOLD 10 60 DSC2_THRESHOLD 20 20 ========================== TAGH ========================== FADC250_MODE 8 #FADC250_W_OFFSET 895 FADC250_W_OFFSET 905 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 1 FADC250_READ_THR 300 FADC250_TRIG_BL 100 FADC250_TRIG_THR 200 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 #FADC250_COM_DIR /home/somov/setups/tagh/parms/common/fadc250 #FADC250_COM_VER ver1 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250 FADC250_COM_VER Run_1270 FADC250_USER_DIR /home/ FADC250_USER_VER CTP_USE 0 # F1 TDC F1TDC_WINDOW 600. F1TDC_LATENCY 3600. #F1TDC_BIN_SIZE 0.056 F1TDC_CLOCK 1 # LE discriminator DSC2_WIDTH 40 40 DSC2_THRESHOLD 45 45 ========================== PS ========================== FADC250_MODE 8 FADC250_W_OFFSET 880 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 1 FADC250_READ_THR 250 FADC250_TRIG_BL 100 FADC250_TRIG_THR 500 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 FADC250_COM_DIR /home/somov/setups/tagh/parms/common/fadc250 FADC250_COM_VER ver2 FADC250_USER_DIR /home/somov/conf/cosmic FADC250_USER_VER ========================== PSC ========================== FADC250_MODE 8 FADC250_W_OFFSET 800 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 1 FADC250_READ_THR 250 FADC250_TRIG_BL 100 FADC250_TRIG_THR 500 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 10 # F1 TDC F1TDC_WINDOW 500. F1TDC_LATENCY 900. # set bin size from 0.056 to 0.058 -> Beni! #F1TDC_BIN_SIZE 0.056 F1TDC_CLOCK 1 # LE discriminator DSC2_WIDTH 40 40 DSC2_THRESHOLD 50 100