# # DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) # DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) # # TS_TRIG_TYPE 1 - Internal Pulser # 2 - External FP # 4 - GTP # 6 - GTP + External # # # TS_FP_INPUTS - List of enabled FP inputs # # # TS_SOFT_TRIG # Trigger type (type 1 or 2 for playback) # Number of events to trigger # Period multiplier (depends on range 0-0x7FFF) # Range 1 - min 120ns, increments of 30ns up to 983.13u # 2 - min 120ns, increments of 30.72us up to 1.007s # # # TI_MASTER 1 - Stand alone with master TI # # TI_MASTER_TRIG 1 - soft, 2 - external pulser, 3 - playback # # TI_SOFT_TRIG # Trigger type (type 1 or 2 for playback) # Number of events to trigger # Period multiplier (depends on range 0-0x7FFF) # Range 1 - min 120ns, increments of 30ns up to 983.13u # 2 - min 120ns, increments of 30.72us up to 1.007s # # F1TDC_CLOCK 0 <- Clock Source (0 = Internal 32 MHz) # (1 = External 31.25 MHz) # F1TDC_VERSION 2 <- Module Version (2 = High Resolution, synchronous, 32 channels) # (3 = Normal Resolution, synchronous, 48 channels) # set bin size from 0.056 to 0.058 -> Beni! # F1TDC_BIN_SIZE 0.058 <- Bin size (ns) # F1TDC_LATENCY 3000.0 <- Trigger latency (ns) # F1TDC_WINDOW 1000.0 <- Trigger window (ns) ========================== TRIGGER ========================== #CALIBRATION 1 USE_PLAYBACK 0 TS_TRIG_TYPE 4 #TS_FP_INPUTS 11 12 TS_SOFT_TRIG 1 64000 0x1FF 1 TS_TD_SLOTS 3 9 14 # SSP SLOT FIBER_EN SUM_ENABLE SSP_SLOT 5 0x02 0 SSP_SLOT 9 0x8 1 SSP_SLOT 10 0 1 # TYPE DELAY INT_WIDTH ENABLE TRIG_EQ PS 35 10 1 TRIG_EQ BCAL_E 20 20 0 TRIG_EQ BCAL_C 20 0 0 TRIG_EQ FCAL 8 15 1 TRIG_EQ ST 20 10 0 TRIG_EQ TOF 20 10 0 # TYPE LATENCY WIDTH FCAL_E BCAL_E EN_THR NHIT LANE TRIG_TYPE PS 440 5 1300 1900 1100 0 0 TRIG_TYPE BFCAL 440 20 5 1 10000 0 -1 TRIG_TYPE BFCAL 440 20 6 1 12000 0 -1 TRIG_TYPE BFCAL 440 20 40 1 64000 0 -1 TRIG_TYPE BFCAL 440 5 10 3 18000 0 -1 TRIG_TYPE BFCAL 440 20 4 1 6000 0 -1 TRIG_TYPE BFCAL 440 5 1 0 1800 0 -1 TRIG_TYPE BFCAL 440 5 0 1 6000 0 -1 TRIG_TYPE BCAL_COS 440 40 1500 2100 1300 0 -1 TRIG_TYPE BFCAL 440 5 1 0 150 0 1 #TS_GTP_PRES 0 2 # Tune TAC # TS_GTP_PRES 1 5 # CHECK TS_GTP_PRES 1 8 # TS_GTP_PRES 1 0 #TS_GTP_PRES 2 2 #TS_GTP_PRES 3 2 #TS_GTP_PRES 0 10 #TS_GTP_PRES 1 5 #TS_GTP_PRES 2 5 TRIG_DELAY 0 DAC_CALIB 0 TI_FIBER_LATENCY_OFFSET 0x98 TS_COIN_WIND 10 # TEST 2, THR = 3 TS_TRIG_HOLD 1 10 0 TS_TRIG_HOLD 2 127 0 TS_TRIG_HOLD 4 40 0 TS_TRIG_HOLD 3 2 1 TI_MASTER 0 TI_MASTER_TRIG 1 TI_FP_INPUTS 3 # TI_SOFT_TRIG 1 10000 0x7FFF 1 TI_SOFT_TRIG 1 10000 0x600 1 BLOCKLEVEL 1 BUFFERLEVEL 1 ========================== GLOBAL ========================== F1TDC_BIN_SIZE 0.058 ========================== TAGH ========================== FADC250_MODE 10 #FADC250_W_OFFSET 895 FADC250_W_OFFSET 905 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 3 # changed from 120 to 300 FADC250_READ_THR 300 #FADC250_READ_THR 10 FADC250_TRIG_BL 100 FADC250_TRIG_THR 200 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 #FADC250_COM_DIR /home/somov/setups/tagh/parms/common/fadc250 #FADC250_COM_VER dac3200 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default FADC250_USER_DIR /home/ FADC250_USER_VER CTP_USE 0 # F1 TDC F1TDC_WINDOW 600. F1TDC_LATENCY 3600. F1TDC_CLOCK 1 # LE discriminator DSC2_WIDTH 40 40 DSC2_THRESHOLD 45 45 ========================== TAGM ========================== FADC250_MODE 9 #FADC250_W_OFFSET 895 FADC250_W_OFFSET 905 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 3 # For low gain mode FADC250_READ_THR 115 # For high gain mode # FADC250_READ_THR 180 # FADC250_READ_THR 10 FADC250_TRIG_BL 100 FADC250_TRIG_THR 210 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 # FADC250_COM_DIR /home/somov/setups/tagh/parms/common/fadc250 # FADC250_COM_VER dac3300 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default FADC250_USER_DIR /gluex/CALIB/TAGM/fadc250/user/spring_2017 FADC250_USER_VER spring_2017_v2 CTP_USE 0 # F1 TDC F1TDC_WINDOW 600. F1TDC_LATENCY 3600. F1TDC_CLOCK 1 # LE discriminator # Change for high gain mode DSC2_WIDTH 40 40 # Changed from 20 to 5 Alex B. # DSC2_THRESHOLD 5 5 DSC2_THRESHOLD 12 12 DSC2_COM_DIR /gluex/CALIB/ALL/dsc/default DSC2_COM_VER spring_2017_v2 ========================== PS ========================== FADC250_MODE 10 FADC250_W_OFFSET 850 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 3 FADC250_READ_THR 140 #FADC250_READ_THR 10 FADC250_TRIG_BL 100 FADC250_TRIG_THR 200 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 # FADC250_COM_DIR /home/somov/setups/tagh/parms/common/fadc250 # FADC250_COM_VER fall_dac3300 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default FADC250_USER_DIR /home/somov/conf/cosmic FADC250_USER_VER ========================== PSC ========================== FADC250_MODE 9 FADC250_W_OFFSET 850 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 3 FADC250_READ_THR 150 #FADC250_READ_THR 10 FADC250_TRIG_BL 100 FADC250_TRIG_THR 150 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 7 # F1 TDC F1TDC_WINDOW 600 F1TDC_LATENCY 3540 F1TDC_CLOCK 1 USE_CTP 0 # LE discriminator DSC2_WIDTH 40 40 DSC2_THRESHOLD 40 40 ========================== TPOL ========================== FADC250_MODE 9 FADC250_W_OFFSET 830 # FADC250_W_OFFSET 920 FADC250_W_WIDTH 50 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 1 FADC250_READ_THR 2000 FADC250_TRIG_BL 100 FADC250_TRIG_THR 1000 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 6 ========================== TABS ========================== FADC250_MODE 10 FADC250_W_OFFSET 800 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 10 FADC250_NPEAK 3 FADC250_READ_THR 120 FADC250_TRIG_BL 100 # FADC250_TRIG_THR 120 # Production FADC250_TRIG_THR 400 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER tac FADC250_USER_DIR FADC250_USER_VER # LE discriminator DSC2_WIDTH 40 40 #DSC2_THRESHOLD 20 20 DSC2_THRESHOLD 40 40 # CAEN 1290 TDC1290_W_WIDTH 3000 TDC1290_W_OFFSET -3000 TDC1290_W_EXTRA 25 TDC1290_W_REJECT 50 TDC1290_BLT_EVENTS 1 TDC1290_N_HITS 64 TDC1290_ALMOSTFULL 16384 TDC1290_OUT_PROG 2 TDC1290_A24_A32 2 TDC1290_SNGL_BLT 3 TDC1290_SST_RATE 0 TDC1290_BERR_FIFO 1 TDC1290_EDGE 2