#! Run type:: PHYSICS_8 Config:: TRG_FCAL_BCAL_m8_b1bf1.conf #! CONFIG FILE:: /home/hdops/CDAQ/daq_dev_v0.31/daq/config/hd_all/TRG_FCAL_BCAL_m8_b1bf1.conf #! (Re)Created:: on Wed Apr 29 12:06:51 EDT 2015 #! # DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) # DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) # # TS_TRIG_TYPE 1 - Internal Pulser # 2 - External FP # 4 - GTP # 6 - GTP + External # # # TS_FP_INPUTS - List of enabled FP inputs # # # TS_SOFT_TRIG # Trigger type (type 1 or 2 for playback) # Number of events to trigger # Period multiplier (depends on range 0-0x7FFF) # Range 1 - min 120ns, increments of 30ns up to 983.13u # 2 - min 120ns, increments of 30.72us up to 1.007s # # # TI_MASTER 1 - Stand alone with master TI # # TI_MASTER_TRIG 1 - soft, 2 - external pulser, 3 - playback # # TI_SOFT_TRIG # Trigger type (type 1 or 2 for playback) # Number of events to trigger # Period multiplier (depends on range 0-0x7FFF) # Range 1 - min 120ns, increments of 30ns up to 983.13u # 2 - min 120ns, increments of 30.72us up to 1.007s # # F1TDC_CLOCK 0 <- Clock Source (0 = Internal 32 MHz) # (1 = External 31.25 MHz) # F1TDC_VERSION 2 <- Module Version (2 = High Resolution, synchronous, 32 channels) # (3 = Normal Resolution, synchronous, 48 channels) # set bin size from 0.056 to 0.058 -> Beni! # F1TDC_BIN_SIZE 0.058 <- Bin size (ns) # F1TDC_LATENCY 3000.0 <- Trigger latency (ns) # F1TDC_WINDOW 1000.0 <- Trigger window (ns) # # TDC1290_INL non-linear corrections for CAEN TDCs # 1 - enabled # 0 - disabled ========================== TRIGGER ========================== #CALIBRATION 1 TS_TRIG_TYPE 6 TS_FP_INPUTS 3 9 10 12 S_FP_DELAY 9 23 TS_FP_DELAY 10 44 TS_FP_DELAY 3 427 TS_SOFT_TRIG 1 0 0x1F 1 # ALL CRATES TS_TD_SLOTS 10 3 6 4 9 7 8 5 14 # SSP SLOT FIBER_EN SUM_ENABLE SSP_SLOT 8 0xFF 1 # SSP for ST # SSP_SLOT 6 0x1 0 # TYPE DELAY INT_WIDTH ENABLE TRIG_EQ PS 20 5 0 TRIG_EQ BCAL_E 12 20 1 TRIG_EQ BCAL_C 12 0 0 TRIG_EQ FCAL 0 10 0 TRIG_EQ ST 22 3 0 TRIG_EQ TOF 12 10 0 TRIG_EQ TAGH 96 0 0 # TYPE LATENCY WIDTH FCAL_E BCAL_E EN_THR NHIT LANE FCAL_EMIN FCAL_EMAX BCAL_EMIN BCAL_EMAX PATTERN TRIG_TYPE BFCAL 440 5 0 1 10000 0 0 TRIG_TYPE ST 440 4 1300 1900 1100 1 -1 #TS_GTP_PRES 0 2 TRIG_DELAY 0 DAC_CALIB 0 TI_FIBER_LATENCY_OFFSET 0x98 TS_COIN_WIND 15 TS_TRIG_HOLD 1 10 0 TS_TRIG_HOLD 2 127 0 TS_TRIG_HOLD 4 40 0 TS_TRIG_HOLD 3 2 1 # TS_SYNC_INT 5000 BLOCKLEVEL 40 BUFFERLEVEL 4 ========================== GLOBAL ========================== F1TDC_BIN_SIZE 0.058 FADC250_BUSY 3 FADC125_BUSY 3 # FADC250_FORMAT 2 # FADC125_FORMAT 1 ========================== FCAL ========================== FADC250_MODE 9 FADC250_W_OFFSET 805 FADC250_W_WIDTH 100 FADC250_NSB 1 FADC250_NSA 15 FADC250_NPEAK 3 FADC250_READ_THR 108 FADC250_TRIG_BL 100 FADC250_TRIG_THR 165 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 10 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2018 FADC250_USER_VER ring2_hot_v3 ========================== BCAL ========================== FADC250_MODE 9 # Changed from 860 to 815 by Alex on 8/29/18 FADC250_W_OFFSET 815 # MMD 2017-01-27 FADC250_W_WIDTH 100 FADC250_NSB 1 FADC250_NSA 26 FADC250_NPEAK 1 FADC250_READ_THR 105 FADC250_NSAT 2 FADC250_TRIG_BL 100 FADC250_TRIG_THR 120 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 19 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default FADC250_USER_DIR /gluex/CALIB/ALL/user FADC250_USER_VER # F1 TDC # change latency from 900. to 3540. and window from 500 to 1000 ->Beni # change latency from 3540. to 3810. to match production (dalton 2018-01-22) #change latency from 3810. to 3540. after changing the global trigger delays (alex 2018-08-31) F1TDC_WINDOW 1000. F1TDC_LATENCY 3540 # set bin size from 0.056 to 0.058 -> Beni! F1TDC_CLOCK 1 # LE discriminator DSC2_WIDTH 20 40 DSC2_THRESHOLD 35 50 DSC2_COM_DIR /gluex/CALIB/ALL/dsc/default DSC2_COM_VER default ========================== TOF ========================== FADC250_MODE 9 FADC250_W_OFFSET 810 FADC250_W_WIDTH 100 FADC250_NSB 1 FADC250_NSA 10 FADC250_NPEAK 3 FADC250_READ_THR 160 FADC250_TRIG_BL 100 FADC250_TRIG_THR 110 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default FADC250_USER_DIR /home/ FADC250_USER_VER # LE discriminator DSC2_WIDTH 20 10 DSC2_THRESHOLD -12 -12 DSC2_COM_DIR /gluex/CALIB/ALL/dsc/default DSC2_COM_VER default # CAEN 1290 TDC1290_W_WIDTH 800 TDC1290_W_OFFSET -3660 TDC1290_W_EXTRA 25 TDC1290_W_REJECT 50 TDC1290_BLT_EVENTS 1 TDC1290_N_HITS 64 TDC1290_ALMOSTFULL 16384 TDC1290_OUT_PROG 2 TDC1290_A24_A32 2 TDC1290_SNGL_BLT 3 TDC1290_SST_RATE 0 TDC1290_BERR_FIFO 1 TDC1290_EDGE 2 # TDC1290_RC SLOT CHIP TAP1 TAP2 TAP3 TAP4 TDC1290_RC 3 0 5 1 4 3 TDC1290_RC 3 1 5 5 1 3 TDC1290_RC 3 2 7 2 7 4 TDC1290_RC 3 3 2 2 7 7 TDC1290_RC 4 0 0 1 6 3 TDC1290_RC 4 1 0 6 1 4 TDC1290_RC 4 2 3 2 0 3 TDC1290_RC 4 3 1 1 5 7 TDC1290_RC 5 0 6 0 1 6 TDC1290_RC 5 1 5 4 1 6 TDC1290_RC 5 2 2 1 2 3 TDC1290_RC 5 3 3 1 7 5 TDC1290_RC 6 0 1 4 6 6 TDC1290_RC 6 1 2 5 0 6 TDC1290_RC 6 2 7 0 7 5 TDC1290_RC 6 3 5 7 1 3 TDC1290_RC 7 0 3 1 6 6 TDC1290_RC 7 1 3 0 3 3 TDC1290_RC 7 2 7 4 1 3 TDC1290_RC 7 3 0 2 7 7 TDC1290_RC 8 0 7 7 0 4 TDC1290_RC 8 1 5 1 7 7 TDC1290_RC 8 2 3 0 4 2 TDC1290_RC 8 3 0 0 0 4 ========================== ST ========================== #change latency to 925 by BENI # also change NSA and NSB from 3/6 to 5/20 FADC250_MODE 9 FADC250_W_OFFSET 860 FADC250_W_WIDTH 100 FADC250_NSB 5 FADC250_NSA 20 FADC250_NPEAK 3 # change FADC250_READ_THR from 800 -> 110 by pooser (5 mV) # change FADC250_READ_THR from 110 -> 120 by pooser (10 mV) FADC250_READ_THR 120 FADC250_TRIG_BL 100 FADC250_TRIG_THR 300 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default FADC250_USER_DIR /home/ FADC250_USER_VER # F1 TDC # change latency from 2100 to 3700 F1TDC_WINDOW 1000. F1TDC_LATENCY 3460. F1TDC_CLOCK 1 # LE discriminator # change DSC2_THRESHOLD from 100 -> 50 by pooser DSC2_WIDTH 20 40 DSC2_THRESHOLD 50 60 ========================== TAGH ========================== FADC250_MODE 9 FADC250_W_OFFSET 915 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 3 FADC250_READ_THR 300 FADC250_TRIG_BL 100 FADC250_TRIG_THR 300 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 6 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default FADC250_USER_DIR /home/ FADC250_USER_VER # CTP_USE 0 # F1 TDC F1TDC_WINDOW 600. F1TDC_LATENCY 3600. F1TDC_CLOCK 1 # LE discriminator DSC2_WIDTH 20 40 DSC2_THRESHOLD 45 45 ========================== TAGM ========================== FADC250_MODE 9 FADC250_W_OFFSET 915 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 3 # For low gain mode #FADC250_READ_THR 115 #(early spring 2016) #FADC250_READ_THR 250 # 4/9/16 aeb # For high gain mode #FADC250_READ_THR 180 #(change 3/30/2016 by RTJ) #FADC250_READ_THR 140 FADC250_READ_THR 200 # (new defaults 4/21/16 by AEB) FADC250_TRIG_BL 100 #FADC250_TRIG_THR 210 FADC250_TRIG_THR 400 # (new defaults 4/21/16 by AEB) FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default FADC250_USER_DIR /gluex/Subsystems/TAGM/calib FADC250_USER_VER test_v1 CTP_USE 0 # F1 TDC F1TDC_WINDOW 600. F1TDC_LATENCY 3700. F1TDC_CLOCK 1 # LE discriminator # Change for high gain mode DSC2_WIDTH 20 40 #DSC2_THRESHOLD 20 20 (changed 2/10/16 by A.B.) #DSC2_THRESHOLD 5 5 (changed for diamond alignment 2/20/16) #DSC2_THRESHOLD 12 12 #DSC2_THRESHOLD 100 150 #(changed 3/30/2016 by RTJ) DSC2_THRESHOLD 12 12 #(changed 4/21/2016 by aeb) ========================== PS ========================== FADC250_MODE 9 FADC250_W_OFFSET 880 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 10 FADC250_NPEAK 3 FADC250_READ_THR 130 FADC250_TRIG_BL 100 FADC250_TRIG_THR 200 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default FADC250_USER_DIR /home/somov/conf/cosmic FADC250_USER_VER ========================== PSC ========================== FADC250_MODE 9 FADC250_W_OFFSET 880 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 3 FADC250_READ_THR 150 FADC250_TRIG_BL 100 FADC250_TRIG_THR 150 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 6 # F1 TDC F1TDC_WINDOW 600 F1TDC_LATENCY 3660 F1TDC_CLOCK 1 # LE discriminator DSC2_WIDTH 20 40 DSC2_THRESHOLD 40 40 ========================== TPOL ========================== FADC250_MODE 10 FADC250_W_OFFSET 825 FADC250_W_WIDTH 150 FADC250_NSB 3 FADC250_NSA 10 FADC250_NPEAK 1 #FADC250_READ_THR 133 changed by Beni to test base lines 01/22/2018 #FADC250_READ_THR 110 changed by Sebastian Cole to further test baselines 01/22/2018 #FADC250_READ_THR 150 changed by Sebastian Cole to further test baselines 01/22/2018 #FADC250_READ_THR 110 FADC250_READ_THR 160 FADC250_TRIG_BL 100 FADC250_TRIG_THR 500 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 6 ========================== CDC ========================== # CDC_short 3 # CDC_long 6 # FDC_short 4 # FDC_amp_short 5 # FDC_sum_long 7 # FDC_amp_long 8 # Modes 3 and 6: IE = 200 and ABIT = 3 # Modes 5 and 8: IE = 10 and ABIT = 0 # Default read out mode before 02/25/2018 # FADC125_MODE 5 # New read out mode requested by Naomi on 02/25/2018 FADC125_MODE 3 # Changed from 438 to 418 by Alex on 8/29/18 FADC125_W_OFFSET 418 FADC125_W_WIDTH 200 # Changed from 200 to 10 by Naomi and Beni # FADC125_IE 10 # New value requested by Naomi on 02/25/201 FADC125_IE 200 FADC125_NPEAK 1 FADC125_PG 4 FADC125_P1 4 FADC125_P2 4 FADC125_IBIT 4 # FADC125_ABIT 0 # New value reuested by Naomi on 02/25/2018 FADC125_ABIT 3 FADC125_PBIT 0 FADC125_TH 60 FADC125_TL 10 FADC125_THR 500 FADC125_DAC 800 # FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/default # FADC125_COM_VER default # FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/spring2017 # FADC125_COM_VER default # New calibration from Beni 11/22/2017 Naomi's thresholds 12/18/2017 # FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2017 # FADC125_COM_VER spring18_TH85 # New thresholds from Naomi 2/2/2018 # FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2017 # FADC125_COM_VER spring2018_B # New calibration from Beni #FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2018 #FADC125_COM_VER fall2018 # New calibration from Beni 2019/10/24 #FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2019 #FADC125_COM_VER summer20_B # New calibration from Beni 2021/08/02 FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/summer2021 FADC125_COM_VER summer2021 FADC125_USER_DIR /gluex/ FADC125_USER_VER ========================== FDC ========================== # CDC_short 3 # CDC_long 6 # FDC_short 4 # FDC_amp_short 5 # FDC_sum_long 7 # FDC_amp_long 8 FADC125_MODE 5 # Changed from 434 to 414 by Alex on 8/29/18 FADC125_W_OFFSET 414 FADC125_W_WIDTH 80 FADC125_IE 16 FADC125_NPEAK 1 FADC125_PG 4 FADC125_P1 4 FADC125_P2 4 FADC125_IBIT 4 FADC125_ABIT 0 FADC125_PBIT 0 FADC125_TH 40 FADC125_TL 10 FADC125_THR 70 FADC125_DAC 800 # FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/spring2017 # FADC125_COM_VER default # New calibration from Beni 8/01/2018 #FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2018 #FADC125_COM_VER fall2018 # New calibration from Beni 2019/10/24 #FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2019 #FADC125_COM_VER summer20 # New calibration from Beni 2021/08/02 FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/summer2021 FADC125_COM_VER summer2021 FADC125_USER_DIR /gluex/ FADC125_USER_VER # F1 TDC # change latency and window back to what we expect from ADCs (Beni) # change latency from 3560 to 3430, Alex 8/31/18 F1TDC_WINDOW 1400. F1TDC_LATENCY 3430. # High-resolution board in slot 17 # changed by Beni (loser) 2014.10.6 # increase window size from 1000 to 1800 (2021.09.03 Beni) F1TDC_HR_WINDOW 1000. F1TDC_HR_LATENCY 1160. # set bin size from 0.056 to 0.058 -> Beni! #F1TDC_HR_BIN_SIZE 0.058 F1TDC_CLOCK 1 ========================== DIRC ========================== SSP_FIBER_W_WIDTH 1000 SSP_FIBER_W_OFFSET 1000 SSP_REG_GLOBAL0 0x69306B87 SSP_REG_GLOBAL1 0x0 SSP_MAROC_REG_DAC0 500 SSP_MAROC_REG_DAC1 0 SSP_MAROC_REG_GAIN_0_15 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 SSP_MAROC_REG_GAIN_16_31 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 SSP_MAROC_REG_GAIN_32_47 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 SSP_MAROC_REG_GAIN_48_63 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 SSP_MAROC_REG_SUM 0x00000000 0x00000000 SSP_MAROC_REG_MASKOR 0x00000000 0x00000000 SSP_TDC_ENABLE 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF # Charge injection # SSP_CTEST_ENABLE 0 # SSP_CTEST_DAC 1000 # SSP_PULSER 1000000 # SSP_MAROC_REG_CTEST 0x00000000 0x00000000 # Charge injection SSP_CTEST_ENABLE 1 SSP_CTEST_DAC 1000 SSP_PULSER 500000 SSP_MAROC_REG_CTEST 0x10000001 0x00000000 SSP_COM_DIR /gluex/CALIB/ALL/ssp/default SSP_COM_VER default