# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) # DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) # # TS_TRIG_TYPE 1 - Internal Pulser # 2 - External FP # 4 - GTP # 6 - GTP + External # # # TS_FP_INPUTS - List of enabled FP inputs # # # TS_SOFT_TRIG # Trigger type (type 1 or 2 for playback) # Number of events to trigger # Period multiplier (depends on range 0-0x7FFF) # Range 1 - min 120ns, increments of 30ns up to 983.13u # 2 - min 120ns, increments of 30.72us up to 1.007s # # # TI_MASTER 1 - Stand alone with master TI # # TI_MASTER_TRIG 1 - soft, 2 - external pulser, 3 - playback # # TI_SOFT_TRIG # Trigger type (type 1 or 2 for playback) # Number of events to trigger # Period multiplier (depends on range 0-0x7FFF) # Range 1 - min 120ns, increments of 30ns up to 983.13u # 2 - min 120ns, increments of 30.72us up to 1.007s # # F1TDC_CLOCK 0 <- Clock Source (0 = Internal 32 MHz) # (1 = External 31.25 MHz) # F1TDC_VERSION 2 <- Module Version (2 = High Resolution, synchronous, 32 channels) # (3 = Normal Resolution, synchronous, 48 channels) # F1TDC_BIN_SIZE 0.056 <- Bin size (ns) # F1TDC_LATENCY 3000.0 <- Trigger latency (ns) # F1TDC_WINDOW 1000.0 <- Trigger window (ns) ========================== TRIGGER ========================== USE_PLAYBACK 0 TS_TRIG_TYPE 2 TS_SOFT_TRIG 1 64000 0xFF 1 TS_TD_SLOTS 14 3 TS_FP_INPUTS 8 9 10 TS_FP_DELAY 8 23 TS_FP_DELAY 9 23 TS_FP_DELAY 10 23 # SSP SLOT FIBER_EN SUM_ENABLE SSP_SLOT 6 0x1 1 # TYPE DELAY INT_WIDTH ENABLE TRIG_EQ PS 20 10 0 TRIG_EQ BCAL_E 20 10 0 TRIG_EQ BCAL_C 20 10 0 TRIG_EQ FCAL 3 10 0 TRIG_EQ ST 20 10 1 TRIG_EQ TOF 20 10 0 # TYPE LATENCY WIDTH FCAL_E BCAL_E EN_THR NHIT LANE TRIG_TYPE PS 420 20 1300 1900 1100 0 -1 TRIG_TYPE BFCAL 440 20 1 0 2000 0 -1 TRIG_TYPE BFCAL 440 20 1 0 1800 0 -1 TRIG_TYPE TOF 440 20 1 1 1100 2 -1 TRIG_TYPE ST 440 20 1 1 1100 1 -1 TRIG_TYPE BCAL_COS 440 40 1500 2100 1300 0 -1 TS_GTP_PRES 0 1 #TS_TRIG_HOLD 62 1 TRIG_DELAY 0 DAC_CALIB 0 TI_FIBER_LATENCY_OFFSET 0x98 TI_MASTER 0 TI_MASTER_TRIG 2 TI_SOFT_TRIG 1 65000 0x7FF 1 BLOCKLEVEL 1 BUFFERLEVEL 1 TI_FIBER_LATENCY_OFFSET 0xCA ========================== GLOBAL ========================== F1TDC_BIN_SIZE 0.058 ========================== PSC ========================== FADC250_MODE 9 #FADC250_W_OFFSET 850 # Changed from 850 to 835 (12/15/16) FADC250_W_OFFSET 835 FADC250_W_WIDTH 100 FADC250_NSB 3 FADC250_NSA 6 FADC250_NPEAK 3 FADC250_READ_THR 150 FADC250_TRIG_BL 100 FADC250_TRIG_THR 150 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 6 # F1 TDC # F1TDC_WINDOW 600 # F1TDC_LATENCY 3540 F1TDC_WINDOW 2000 F1TDC_LATENCY 3000 F1TDC_CLOCK 1 # LE discriminator DSC2_WIDTH 20 40 DSC2_THRESHOLD 40 40 ========================== ST ========================== FADC250_MODE 10 FADC250_W_OFFSET 500 FADC250_W_WIDTH 300 FADC250_NSB 5 FADC250_NSA 20 FADC250_NPEAK 1 FADC250_READ_THR 90 FADC250_TRIG_BL 100 FADC250_TRIG_THR 150 FADC250_TRIG_NSB 3 FADC250_TRIG_NSA 15 FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default FADC250_COM_VER default FADC250_USER_DIR /home/ FADC250_USER_VER # F1 TDC # F1TDC_WINDOW 600 # F1TDC_LATENCY 2100 # F1TDC_WINDOW 600 # F1TDC_LATENCY 2100 F1TDC_WINDOW 2000 F1TDC_LATENCY 3000 F1TDC_CLOCK 1 # LE discriminator DSC2_WIDTH 40 40 DSC2_THRESHOLD 50 60