Minutes 1-10-2007

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FDC Weekly Meeting

Date: January 10, 2007

Participants: Daniel, Tim, Chuck, Roger, Fernando, Kim, Elke, Simon, Brian

Next Meeting: Wednesday, January 17, 2007 @ 1:30 p.m.

Fermilab Trip

 - Brian will contact Karen Kephart from Fermilab to set up a time
   for us all to go up there to discuss the FDC design.  We will
   try to arrange the trip this month.  We need to decide the folks
   who will go.  This should be a 1-day trip.

Gerard Visser Visit

 - Simon will coordinate with Gerard Visser from IU regarding a
   visit from him to JLab next week.  Gerard will work with Simon
   on incorporating his new shaper module into the small-scale
   prototype setup.

Cathode Mechanical Mockups

 - All materials for construction of the mechanical cathode sandwiches
   are in hand. Brian is beginning work on making several mechanical
   mockups of the cathode sandwiches to develop the techniques to meet
   our tolerances.
 - A decision on dE/dX for the FDCs needs to be made soon that we can
   set the final flatness tolerances for the cathodes.  The present
   flatness spec of 50 microns is presently driven by the dE/dX
   requirement.  If this requirement is removed, this tolerance could
   be relaxed.
 - The construction of the full-scale tensioning apparatus is in the
   hands of the machine shop.  It will be on hold for a week or two
   as a machine in the shop broke and they are waiting on repair.
 - Brian expects to have one or two completed cathode sandwiches on
   the time scale of 1 week.
 - Brian will contact outside firms and the JLab survey crew about
   completing the flatness measurements this month.

Budget Issues

 - Brian will follow up with Karen Kephart on providing a quote for
   the wire stringing.  This is our one outstanding budget line.  This
   quote is needed in about 1 week.
 - Elke asked that we provide her with an R&D budget for FY07 and an
   impact statement on what will happen to the project if the funds are
   not available.

ASIC Design

 - Fernando has been in contact with Mitch Newcomer about additional
   design work on the ASICs to incorporate a discriminator for each
   channel.  These discussions have focussed on the level of work
   required to complete this task.
 - Mitch will need to prepare a new contract for this work.  Elke and
   Elton are in the loop on this.
 - If funds are available, this work could begin in March -- after the
   order for the first run of analog ASICs is out the door.
 - Fernando stated that the new ASIC could include both analog and
   discriminated output on the same chip.  The operating mode would
   be selectable.

STB Design Work

 - Kim and Roger have started to lay out the traces given that the STB
   board dimensions are converging.
 - Fernando is still working on the daughter board design to make it
   shorter radially.  This design needs to be finalized for Roger and
   Kim to proceed.
 - We discussed the solder pad size, the spacing of the isolation
   capacitors from the field wire solder pads (at least 100 mil, if not
   more), and the positioning of the electronics components.
 - Note that we still do not have an answer whether the STBs and HVTBs
   can be stuffed before the wire stringing takes place.

Thermal Simulations

 - Tim has been working on cooling calculations.  This has led him to
   use expanded aluminum mesh for the radiator to give more surface
   area, mass, and convective cooling space.  He believes his solution
   will be sufficient for us to avoid water cooling.  He still has
   more detailed simulation work to carry out before converging.

Mechanical Drawings

 - Chuck showed us his latest 3D mechanical drawings now including
   the current connector placements on the anode and cathode boards
   and including the cables.  It looks like the space for the connectors
   is sufficient and that there are no conflicts for real estate for
   the daughter boards, cables, or connectors.

Minutes prepared by Daniel. Send any comments or corrections along.