FDC Weekly Meeting
Date: September 5, 2007
Participants: Daniel, Brian, Chuck, Tim, Kim, Roger, Fernando
Next Meeting: September 12, 2007
Composite Wire Frame
- The machine shop has promised that the through-holes and o-ring groove in our composite frame will be completed by the end of September. They cannot be more definite than this. They have two frames to complete. One is of the nominal design and the other has a thicker Rohacell core. - DSC will take some pictures of the frame for the upcoming DOE FDC report.
- No work done yet. Brian will get to this soon.
- Kim has made progress on the layout of the dummy STB and HVTB boards needed for the test winds at FNAL planned for October. These boards will be of the nominal design size and will include the solder pads and the sighting fiducials. - Roger has received verification from Sierra that they can indeed make our two piece boards. Kim has double checked that the correct files were sent. - Kim so far has laid out the outlines of the boards but has not yet laid out the overlap region of neighboring STBs and HVTBs. She will seek help from Fernando on specifying this. - Kim has completed the layout of the side junction boards. - When she has completed the layout of the boards she will send them around for comments and feedback. - Kim will take care of the ordering of the boards. We will request 5 sets of each board (HVTB and STB) and 10 side pieces. - Brian will make the alignment jig for construction. This will consist of an aluminum ring with tapered pillars to go through the through holes. Chuck will sent Brian the details for the hole pattern. We will require at least two pillars for each STB and HVTB board to serve as our alignment points. The junction boards (without critical dimensions) will go on last. - After Kim finishes the dummy board design, she will move on to the layout of the "real" boards. - Kim will send DSC the layout for the STBs and HVTBs for inclusion in the DOE FDC report by the end of the month.
Magnetic Field Tests
- Progress continues on setting up for the tests. All chambers are in place, cabled up, have had gas flowing for several weeks, and have been sitting at roughly plateau voltage. - Simon ran into some trouble last week with some network problems, some subtle VME problems, and possibly a bad F1 TDC. - When Simon gets back he will work to address the configuration and network problems with local experts and then install the two remaining F1 TDCs that he received from Fernando last week.
- Fernando has the completed daughter boards and work will proceed over the next week to stuff these boards with components and ASICs. They will then be sent to Mitch Newcomer for testing and for evaluation of several resistors. When he has certified them, we will get them back for studies. There should be 10 daughter boards in all and we need four cathode-type boards and one anode-type board for the small-scale prototype. - Fernando has completed the layout of the transition boards for the small-scale prototype and the order has been placed. He expects them to arrive at JLab within a week. He will then move to test them and get them ready for installation on the chamber. - Fernando expects that we will have boards ready for installation on the small-scale prototype in roughly a month. - Fernando also reported that Mitch has measured the ASIC power dissipation and it came out to be 45 mW/channel. Our nominal design for the cooling system had assumed 40 mW/channel.
- The procurements for the sense and field wire, along with the G10 skins have been completed and the orders have gone out. - The spending for the dummy boards was not made due to delays on completing this work. Elke assures us that this will not be a problem and she will sign the PR when we are ready to place the order.
- Brian has not gotten to the mounting of the +/-75 deg cathode boards. He has everything he needs to do this work, but has not had time. He will get to this soon.
Cathode Rough Out
- Roger has done some work to study the cathode design including a hole in the middle of the board. His layout actually employed a hole of 8 cm radius. Oops, it should have been 8 cm diameter. He will redo the layout. It looks like we should have less than 24 split strips (which is our daughter board readout quantization). We will look into the design also with a 3 cm radius hole. The hope is that we can have a very similar cathode design for these two options. Nominally we are considering a 3 cm radius hole for the two upstream packages and a 4 cm radius hole for the two downstream packages.
Cathode Board Readout
- After Roger completes the cathode design including the hole, he will work to complete a design for the cathode readout. The plans are to include a cut out in the cathode support frame through which a flex cable will be fed that connects to the daughter board connector. After we have a design, we will work to make a prototype to test and optimize the design.
- DSC has begun work on the DOE FDC report. The text is essentially finished and the document is missing some photographs and Monte Carlo plots. Folks will be contacted if needed to provide help.
- The FDC short-term work list has been posted on the FDC web site (see http://www.jlab.org/Hall-D/detector/fdc/). This is continually being updated and DSC welcomes any feedback or comments from the group.
Minutes prepared by Daniel. Send any comments or corrections along.