View source for Configuration for 2025 run


All signal cables are connected to the flash ADC in Slot 3 of the D2-4-BOT, ccal crate.
The TAC is connected to the former CCAL crate. The reconstruction of TAC hits (and EPICS scalers) can be done using 
the CCAL translation table.  The TAC HV is provided by the CAEN module in Slot 10 of the halldcaenhv10 (D2-8-MID, 129.57.26.211) 
crate. This crate also contains HV modules for the DIRC. The mapping of TAC channels is presented in the table below.

{|border="1" cellpadding="5" cellspacing="0" align="center"
! scope="col" | TAC channel
! scope="col" | ADC channel
! scope="col" | CCAL (column, row)
! scope="col" | HV channel (Slot 10, D2-8-MID)
|-
|  1
|  0
|  1, 2
|  1
|-
|  2
|  1
|  1, 3
|  2
|-
|  3
|  2
|  1, 4
|  3
|-
|  4
|  3
|  1, 5
|  4
|-
|  5
|  4
|  2, 1
|  5
|-
|  6
|  5
|  2, 2
|  6
|-
|  7
|  6
|  2, 3
|  7
|-
|  8
|  7
|  2, 4
|  8
|-
|  9
|  8
|  2, 5
|  9
|}


The definition of channels in the 3 x 3 PbWO4 array:

9 8 7 

6 5 4 

3 2 1