Difference between revisions of "2020 Winter - 2021 Spring"
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(→2020 Summer DIRC To-do List) |
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Line 13: | Line 13: | ||
#** 1 day | #** 1 day | ||
#** If mirror problem, adding 6 more days for mirror replacement. | #** If mirror problem, adding 6 more days for mirror replacement. | ||
+ | #* South box module c2r18 over current limit diagnosis work | ||
# Non Hall Work: | # Non Hall Work: | ||
#* Testing spare DIRC modules | #* Testing spare DIRC modules | ||
Line 22: | Line 23: | ||
#* Tile FPGA voltage regulation issue. | #* Tile FPGA voltage regulation issue. | ||
#* Recover loan-out (Duke SOLID group) MOROC chips | #* Recover loan-out (Duke SOLID group) MOROC chips | ||
+ | |||
+ | # Not-to-forget items: | ||
+ | #* Re-activate tile-temperature alarm for the south box c2r18 | ||
+ | #* Including south box c2r18 fiber verification back into the DAQ starting procedure |
Revision as of 12:29, 28 August 2020
- Hall work:
- Water level sensor installation
- Total: 2 days. 1 day testing + 1 day installation
- Darkening leak check
- Total: 1 day
- Modification on vent exit to reduce FPGA temperature
- Total: 3 days. 1 day diagnose, 1 day test and 1 day installation. Excluding time for designing time.
- DIRC Diffuser seal issue
- Total: 2 days. 1 day test and 1 day installation. Excluding time for water seal test
- Contaminated mirror replacement in north upper OB
- Total: 1 days. Uninstall + Disassembly: 1 day; mirror removal + setting up clean area, mirror gluing+ curing: 3 days; silicone seal + cleaning + assembly: 1 days; installation: 1 day. Excluding time for water seal test
- Inspect the south lower OB
- 1 day
- If mirror problem, adding 6 more days for mirror replacement.
- South box module c2r18 over current limit diagnosis work
- Water level sensor installation
- Non Hall Work:
- Testing spare DIRC modules
- Control and operation
- Alarm modification strategy
- Resolving (double checking) DIRC hole in occupancy before run starts
- Dis-entangle DIRC interlock and interlock reset from FCAL and CCOM
- Individual (stand alone) SiPM TDA offset
- Tile FPGA voltage regulation issue.
- Recover loan-out (Duke SOLID group) MOROC chips
- Not-to-forget items:
- Re-activate tile-temperature alarm for the south box c2r18
- Including south box c2r18 fiber verification back into the DAQ starting procedure