BCAL Reconstruction Meeting 2014-09-04
Revision as of 18:12, 5 September 2014 by Zisis
Video Conferencing Information
Meeting Time: 12:00 p.m. EDT
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Participant Direct Lines
- JLab Phone: in CC F326 is 757-269-6460 (usual room)
- JLab Phone in CC L207 is 757-269-7084
- Phone in the Regina Video-conference Suite is 306-585-4204
- Reconstruction code
- Sampling fraction tables
- Shower curvature tables: compare KLOE to IU codes: check gap in cluster handling between codes.
- time-walk: check fits, decide on 1 or 2 iterations)
- timing: extracted from F1TDC and compared to fADC
- z-coordinate determination from up/down amplitude ratio
- set variable “failures” to a number other than zero (e.g. -9999 or similar)
- comb code for constants to be pulled out into a database
- Action Items
- Comments on Tegan's fADC time-walk code (see his email of August 21)
- Any other business
Attendees: David, Mark D., Will L., Tegan, Andrei, Zisis
- Announcements: Zisis informed the group of two new grad students at Regina: Noemi Ochoa (MSc) arrived on Aug 31 and will primarily work on the BCAL calibration and Ahmed Foda (PhD) due to arrive on Sep 20 and will work on Reconstruction/PWA.
- Action Items: skip for the time being
- BDT: Tegan and Justin are pondering what to do next. Zisis asked that Tegan present their work to date at the next meeting and ask for ideas.
- Comments on Tegan's fADC time-walk code (see his email of August 21): The idea behind this is to get the flash algorithm into the simulations code and replace the current timing based on threshold crossing. Will had gone through Tegan's code and suggests:
- That Tegan document the code to be understandable by all users.
- That the bin width be corrected as it does not correspond to the 4ns sample time. Later on Will emailed that the bin width is 1.1 ns. We discussed whether to install a non-zero pedestal having a width for the simulations. We decided to leave the pedestal at zero for now and revisit the issue later. Mark pointed out that the bulk of the width on the data pedestals is from the flash ADC noise; the dark hits provide negligible contribution in comparison. Measurements were taken setting the SiPM HV to zero but having the LV still on. Zisis suggested that LV=0 also be measured and Mark will do it this afternoon.
- Will recommended that Tegan remove the 'corner cases' (problems in finding the peak) from the code -- to Tegan's relief, as that code was the most complex and prone to errors.
- A few other minor technical issues which Will will communicate by email to Tegan. Will will also suggest suitable plots to use so that Tegan can run simulations and compare threshold timing code vs flash timing code.
- Any other business:
- Zisis reported that Tegan has successfully compiled the Hall D software on our local cluster (hydra) and soon we will attempt the same on the Westgrid clusters.
- We agreed to keep the time of the meeting to noon EDT for now, and then switch it back to 11am EST in early November when daylight savings ends.