DIRC Planning for FY16

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Revision as of 10:13, 26 February 2016 by Jrsteven (Talk | contribs) (Optical Boxes)

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Support Structure

  • Milestone: Design finalized May-June 2016
    • Optical box length needed to determine how they will be supported
    • Design review by JLab (ie. Tim et. al.): assume ~4 weeks
  • Milestone: Fabrication start July-August 2016
    • Get started on contract with IU: Statement of Work and Sole Source Justification

Optical Boxes

  • Milestone: Design finalized July-August 2016
    • Is additional support for engineering time at MIT needed?
    • Design review by JLab (ie. Tim et. al.): assume ~4 weeks
  • Milestone: Fabrication start September-October 2016
    • Get started on contract with MIT: Statement of Work and Sole Source Justification

Electronics

  • Milestone: ASIC and Adapter board order submitted July-August 2016
    • Some delay in MAROC chip packaging, so CLAS order of ASIC and Adapter boards may be delayed.
  • Opportunity: Possible use of FPGA boards from CLAS
    • The FPGA boards for CLAS were produced with wrong hole size, but could be used for GlueX.
    • Could assemble boards ~now. Waiting for quote from vendor to evaluate cost reduction.

Transportation

  • Milestone: Shipping crate design finalized October 2016
    • Technically FY17, but considering additional transportation tests planed, should we start earlier?