Difference between revisions of "Full Crate Acceptance"

Revision as of 16:59, 8 August 2012

Preliminary Plan for Full Crate Acceptance Testing

Setup

Load up crate with modules: (All modules will have passed individual acceptance testing)

• Controller
  • PXE Boot.... diskless OS configuration.

• TI
• SD
• CTP

• FADC250v2
  • Assign its VME address according to its VME slot.

       (slot<<19).  E.g. Slot 3: (3<<19) = 0x180000
                         Slot 4: (4<<19) = 0x200000

• • Set switches for remote firmware updating

Power up

• Update firmware, if necessary.

Testing

Pedestal run

• Use trig1 generated by TI
• 100k events
• Record Means and RMS of each channel.

Playback mode

• Use trig2 generated by TI
• Output trigger from CTP to TI for trig1.
• 3 to 4 different patterns to be used
• Test Raw, Pulse, TDC readout mode of FADC.
• Verify alignment of data at CTP (periodically).
• For each pattern and mode, generate summary plots

Trigger generation from signal fan-out

• Fan out 16 (or more) copies of signals to FADC Channels
• Test Raw, Pulse, TDC readout mode of FADC.
• Verify alignment of data at CTP (periodically).
• For each mode, generate summary plots

What to include in Summary Plots (PDF)

• Date and time of tests.
• Serial Numbers and firmware of each module used
• Results from pedestal run
• Results from playback mode.
• Results from signal fanout

What the GUI needs to do

• Entry boxes for module serial numbers
• Screens/pages showing FADC data accumulation vs. CTP output
• Output results to PDF
• Be easy to use

Program Planning