Minutes-2-9-2012
February 9, 2012 FDC meeting
Agenda
- Production update Construction Tracking (Dave)
- Third package status
- Electroplating results
- First package testing FDC ELOG (Beni, Lubomir)
- Engineering update (Bill)
- Electronics update (Chris)
- Other
Minutes
Participants: Bill, Dave, Chris, Mark, Simon, Beni, and Lubomir.
Production
- Dave: wire boards #20 and #21 waiting for electroplating. #22 will be populated soon by Chris. The problem on #23 was fixed (see pictures attached): the signal trace on wire #96 had short to ground on the back side of the PCB close to the via. The frame was drilled on the back side through the G10 and Rohacell to reach the board, the trace was disconnected before the via and insulated wire was used to make connection to the other side of the board through the via. Wire frame #13 was given to the EEFAB people for gluing the traces under the HV caps that de-laminated, but they have sent the board to an outside company. There they decided that the traces have enough strength and soldered the HV caps, all this without our knowledge! Fortunately, after replacing one cap with a solder ball on the back, the dark current is now low enough. The next step was to put epoxy on the caps since they are hanging now on the traces. For that, samples were made to test the dark current change. On one cap we had ~200nA with Scotch-weld and ~400nA with Epon one day after gluing across the cap. Therefor the decision was to put Scotch-weld only on the sides of the caps. Ten caps on the sides of the wire frame were already glued. After making sure the dark current is reasonable we will continue with the rest. Working also the cathodes for the third cell of the third package.
- Two more samples using the electroplating
