Difference between revisions of "Trigger and Readout Electronics"

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Line 26: Line 26:
  
 
Serial DSC2:
 
Serial DSC2:
 +
  
 
<ins> F1TDC </ins>
 
<ins> F1TDC </ins>
 +
 +
Downstream End
 +
 +
 +
{|border="1" cellpadding="5" cellspacing="0" align="center"
 +
|-
 +
! scope="row" | TDC Channel
 +
! scope="row" | 0
 +
! scope="row" | 1
 +
! scope="row" | 2
 +
! scope="row" | 3
 +
! scope="row" | 4
 +
! scope="row" | 5
 +
! scope="row" | 6
 +
! scope="row" | 7
 +
! scope="row" | 8
 +
! scope="row" | 9
 +
! scope="row" | 10
 +
! scope="row" | 11
 +
! scope="row" | 12
 +
! scope="row" | 13
 +
! scope="row" | 14
 +
! scope="row" | 15
 +
|-
 +
! scope="row" | BCAL TDC Channel
 +
! scope="row" | 0
 +
! scope="row" | 1
 +
! scope="row" | 2
 +
! scope="row" | 3
 +
! scope="row" | not used
 +
! scope="row" | not used
 +
! scope="row" | not used
 +
! scope="row" | not used
 +
! scope="row" | 4
 +
! scope="row" | 5
 +
! scope="row" | 6
 +
! scope="row" | 7
 +
! scope="row" | 8
 +
! scope="row" | 9
 +
! scope="row" | 10
 +
! scope="row" | 11
 +
|}

Revision as of 11:50, 3 April 2012

FADC 250

  • Flash 1: Slot 14 (B21595_30R, Address 0x700000 )
  • Flash 2: Slot 15 (B21595_14R, Address 0x780000)

Range: 2 V


  • FADC1 - downstream end
Ch 0 - 3 1st layer
Ch 4 - 7 2nd layer
Ch 8 - 11 3rd layer
Ch 12 - 16 4th layer (no TDC outputs on it)
  • FADC1 - upstream end


JLab LE discriminators

Serial DSC1:

Serial DSC2:


F1TDC

Downstream End


TDC Channel 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
BCAL TDC Channel 0 1 2 3 not used not used not used not used 4 5 6 7 8 9 10 11
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