JLab High Resolution TDC

Document #:

GlueX-doc-118-v1

Document type:

Talk

Submitted by:

Ed Jastrzembski

Updated by:

Ed Jastrzembski

Document Created:

23 Jul 2003, 13:55

Contents Revised:

23 Jul 2003, 13:55

Metadata Revised:

08 Jul 2004, 10:26

Abstract:

Project started ~ 2.5 years ago as an effort to test and understand the performance of the F1 TDC chip for use in HallD. It evolved into a product that we plan to deliver for use in experiments at JLab in January ’04. The first prototype has been working since Sept ’02 – with a few small fixes and additions it will become a useful module in current experiments.

Files in Document:

• PowerPoint file (ERhighresTDCs_july2003_EJ.ppt, 1.0 MB)

Topics:

• Rates, Trigger and DAQ:Data Rates

Authors:

• Ed Jastrzembski

Keywords:

electronics