Content:
#
# fadc250 config file - EXAMPLE
#
# this file contains settings for
# fADC250 - JLAB VXS Flash ADC 12-bit 250 Msps 16 ch
#
# format:
# ~~~~~~~
# CRATE rocbcal1 <- ROC name, crate name, usually IP name
# FADC250_ALLSLOTS <- just keyword - all settings after this line will be implemented
# for all slots, till FADC250_SLOTS will be met
# FADC250_SLOTS 3 8 15 <- slot_numbers - in which next settings will be implemented
# till file ends or next FADC250_SLOTS will be met
#
# FADC250_F_REV 0x0216 <- firmware revision (0x0 Bits:7-0)
# FADC250_B_REV 0x0908 <- board revision (0x0 Bits:15-8)
# FADC250_ID 0xfadc <- board type (0x0 Bits:31-16)
#
# FADC250_MODE 1 <- process mode: 1-4 (0x10C Bits:2-0)
# FADC250_W_OFFSET 50 <- number of sample back from trigger point. (0x120)
# (in Manual it is PL=Trigger_Window(ns) * 250MHz)
# FADC250_W_WIDTH 49 <- number of ADC sample to include in trigger window. (0x11C)
# (in M: PTW=Trigger_Window(ns) * 250MHz, minimum is 6)
# FADC250_NSB 3 <- number of sample before trigger point to include in data processing. (0x124)
# This include the trigger Point. (minimum is 2 in all mode)
# FADC250_NSA 6 <- number of sample after trigger point to include in data processing. (0x128)
# Minimum is (6 in mode 2) and ( 3 in mode 0 and 1).
# Number of sample report is 1 more for odd and 2 more for even NSA number.
# FADC250_NPEAK 1 <- number of Pulses in Mode 2 and 3. (0x10C Bits:6-5)
#
# 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 - channels ##
# FADC250_ADC_MASK 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 <- channel enable mask (0x110)
# FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- trigger enable mask
# (channel includes in global trigger, if bit set to 1)
# FADC250_TET 110 <- board Trigger Energy Threshold (TET), same for all 16 channels
# FADC250_CH_TET 0 110 <- channel# and TET_value for this channel
# FADC250_ALLCH_TET 111 222 2 3 4 5 6 7 8 9 10 11 12 13 14 15 <- 16 TETs (0x12C - 0x148)
#
# FADC250_DAC 3300 <- board DAC, one and the same for all 16 channels
# FADC250_CH_DAC 0 3300 <- channel# and DAC_value for this channel
# FADC250_ALLCH_DAC 3300 3280 3310 3280 3310 3280 3310 3280 3300 3280 3300 3280 3310 3280 3310 3280 <- 16 DACs
#
# FADC250_PED 210 <- board Pedestals, same for all channels
# FADC250_CH_PED 0 210 <- channel# and Pedestal_value for this channel
# FADC250_ALLCH_PED 210 220 210 215 215 220 220 210 210 215 215 220 220 210 215 220 <- 16 PEDs
CRATE rocfcal9
############################
FADC250_SLOTS 3
#########################
FADC250_ALLCH_DAC 3388 3414 3382 3361 3378 3372 3374 3383 3390 3382 3308 3403 3395 3390 3391 3348
############################
FADC250_SLOTS 4
#########################
FADC250_ALLCH_DAC 3357 3365 3387 3339 3368 3394 3374 3347 3360 3372 3381 3367 3367 3370 3365 3360
############################
FADC250_SLOTS 5
#########################
FADC250_ALLCH_DAC 3359 3359 3366 3375 3363 3377 3358 3346 3372 3359 3343 3364 3373 3364 3356 3355
############################
FADC250_SLOTS 6
#########################
FADC250_ALLCH_DAC 3369 3367 3369 3342 3376 3386 3390 3357 3345 3361 3368 3349 3359 3361 3343 3388
############################
FADC250_SLOTS 7
#########################
FADC250_ALLCH_DAC 3375 3356 3379 3329 3377 3360 3358 3368 3360 3371 3352 3336 3338 3353 3364 3349
############################
FADC250_SLOTS 8
#########################
FADC250_ALLCH_DAC 3354 3383 3362 3374 3357 3387 3379 3370 3373 3383 3373 3367 3352 3384 3371 3378
############################
FADC250_SLOTS 9
#########################
FADC250_ALLCH_DAC 3382 3378 3372 3367 3361 3397 3364 3356 3377 3366 3383 3378 3371 3350 3380 3352
############################
FADC250_SLOTS 10
#########################
FADC250_ALLCH_DAC 3380 3393 3375 3381 3381 3415 3371 3377 3369 3372 3359 3365 3405 3375 3353 3385
############################
FADC250_SLOTS 13
#########################
FADC250_ALLCH_DAC 3347 3364 3382 3354 3377 3373 3358 3384 3372 3365 3379 3372 3358 3365 3346 3354
############################
FADC250_SLOTS 14
#########################
FADC250_ALLCH_DAC 3361 3347 3351 3332 3363 3344 3358 3368 3363 3358 3326 3347 3347 3335 3351 3351
############################
FADC250_SLOTS 15
#########################
FADC250_ALLCH_DAC 3345 3392 3384 3350 3380 3393 3381 3376 3364 3361 3365 3339 3364 3369 3344 3380
############################
FADC250_SLOTS 16
#########################
FADC250_ALLCH_DAC 3371 3342 3361 3355 3356 3355 3341 3373 3350 3376 3342 3389 3370 3357 3369 3351
############################
FADC250_SLOTS 17
#########################
FADC250_ALLCH_DAC 3348 3373 3367 3371 3358 3357 3363 3370 3347 3359 3372 3367 3362 3389 3358 3352
############################
FADC250_SLOTS 18
#########################
FADC250_ALLCH_DAC 3368 3381 3358 3351 3362 3345 3376 3360 3377 3365 3360 3381 3354 3383 3343 3375