Content:
#
# fadc250 config file - EXAMPLE
#
# this file contains settings for
# fADC250 - JLAB VXS Flash ADC 12-bit 250 Msps 16 ch
#
# format:
# ~~~~~~~
# CRATE rocbcal1 <- ROC name, crate name, usually IP name
# FADC250_ALLSLOTS <- just keyword - all settings after this line will be implemented
# for all slots, till FADC250_SLOTS will be met
# FADC250_SLOTS 3 8 15 <- slot_numbers - in which next settings will be implemented
# till file ends or next FADC250_SLOTS will be met
#
# FADC250_F_REV 0x0216 <- firmware revision (0x0 Bits:7-0)
# FADC250_B_REV 0x0908 <- board revision (0x0 Bits:15-8)
# FADC250_ID 0xfadc <- board type (0x0 Bits:31-16)
#
# FADC250_MODE 1 <- process mode: 1-4 (0x10C Bits:2-0)
# FADC250_W_OFFSET 50 <- number of sample back from trigger point. (0x120)
# (in Manual it is PL=Trigger_Window(ns) * 250MHz)
# FADC250_W_WIDTH 49 <- number of ADC sample to include in trigger window. (0x11C)
# (in M: PTW=Trigger_Window(ns) * 250MHz, minimum is 6)
# FADC250_NSB 3 <- number of sample before trigger point to include in data processing. (0x124)
# This include the trigger Point. (minimum is 2 in all mode)
# FADC250_NSA 6 <- number of sample after trigger point to include in data processing. (0x128)
# Minimum is (6 in mode 2) and ( 3 in mode 0 and 1).
# Number of sample report is 1 more for odd and 2 more for even NSA number.
# FADC250_NPEAK 1 <- number of Pulses in Mode 2 and 3. (0x10C Bits:6-5)
#
# 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 - channels ##
# FADC250_ADC_MASK 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 <- channel enable mask (0x110)
# FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- trigger enable mask
# (channel includes in global trigger, if bit set to 1)
# FADC250_TET 110 <- board Trigger Energy Threshold (TET), same for all 16 channels
# FADC250_CH_TET 0 110 <- channel# and TET_value for this channel
# FADC250_ALLCH_TET 111 222 2 3 4 5 6 7 8 9 10 11 12 13 14 15 <- 16 TETs (0x12C - 0x148)
#
# FADC250_DAC 3300 <- board DAC, one and the same for all 16 channels
# FADC250_CH_DAC 0 3300 <- channel# and DAC_value for this channel
# FADC250_ALLCH_DAC 3300 3280 3310 3280 3310 3280 3310 3280 3300 3280 3300 3280 3310 3280 3310 3280 <- 16 DACs
#
# FADC250_PED 210 <- board Pedestals, same for all channels
# FADC250_CH_PED 0 210 <- channel# and Pedestal_value for this channel
# FADC250_ALLCH_PED 210 220 210 215 215 220 220 210 210 215 215 220 220 210 215 220 <- 16 PEDs
CRATE rocfcal6
############################
FADC250_SLOTS 3
#########################
FADC250_ALLCH_DAC 3359 3372 3358 3368 3382 3389 3388 3367 3375 3381 3371 3360 3394 3387 3388 3365
############################
FADC250_SLOTS 4
#########################
FADC250_ALLCH_DAC 3383 3365 3382 3391 3403 3382 3377 3396 3382 3367 3380 3356 3388 3379 3381 3368
############################
FADC250_SLOTS 5
#########################
FADC250_ALLCH_DAC 3369 3388 3379 3353 3375 3362 3382 3389 3387 3382 3369 3379 3360 3377 3363 3375
############################
FADC250_SLOTS 6
#########################
FADC250_ALLCH_DAC 3339 3351 3361 3347 3362 3367 3381 3359 3349 3363 3355 3353 3408 3339 3366 3355
############################
FADC250_SLOTS 7
#########################
FADC250_ALLCH_DAC 3358 3353 3352 3357 3386 3365 3371 3358 3379 3394 3363 3357 3354 3367 3372 3368
############################
FADC250_SLOTS 8
#########################
FADC250_ALLCH_DAC 3365 3328 3366 3353 3361 3391 3391 3364 3356 3373 3360 3395 3378 3368 3350 3340
############################
FADC250_SLOTS 9
#########################
FADC250_ALLCH_DAC 3352 3365 3357 3354 3351 3399 3389 3358 3362 3384 3370 3373 3371 3331 3333 3365
############################
FADC250_SLOTS 10
#########################
FADC250_ALLCH_DAC 3371 3346 3370 3363 3411 3371 3384 3393 3359 3359 3384 3394 3386 3401 3356 3373
############################
FADC250_SLOTS 13
#########################
FADC250_ALLCH_DAC 3356 3375 3349 3348 3363 3365 3371 3383 3371 3384 3363 3358 3384 3362 3354 3359
############################
FADC250_SLOTS 14
#########################
FADC250_ALLCH_DAC 3381 3376 3394 3390 3390 3356 3399 3399 3378 3356 3354 3367 3367 3374 3381 3356
############################
FADC250_SLOTS 15
#########################
FADC250_ALLCH_DAC 3348 3387 3357 3352 3383 3360 3380 3379 3385 3388 3376 3358 3378 3370 3365 3356
############################
FADC250_SLOTS 16
#########################
FADC250_ALLCH_DAC 3368 3381 3349 3354 3375 3353 3374 3346 3365 3366 3362 3396 3372 3342 3371 3366
############################
FADC250_SLOTS 17
#########################
FADC250_ALLCH_DAC 3330 3366 3345 3341 3359 3362 3351 3368 3346 3368 3342 3372 3372 3347 3344 3335
############################
FADC250_SLOTS 18
#########################
FADC250_ALLCH_DAC 3370 3383 3361 3382 3393 3372 3385 3389 3369 3401 3376 3373 3387 3360 3377 3382