Content:
#
# fadc250 config file - EXAMPLE
#
# this file contains settings for
# fADC250 - JLAB VXS Flash ADC 12-bit 250 Msps 16 ch
#
# format:
# ~~~~~~~
# CRATE rocbcal1 <- ROC name, crate name, usually IP name
# FADC250_ALLSLOTS <- just keyword - all settings after this line will be implemented
# for all slots, till FADC250_SLOTS will be met
# FADC250_SLOTS 3 8 15 <- slot_numbers - in which next settings will be implemented
# till file ends or next FADC250_SLOTS will be met
#
# FADC250_F_REV 0x0216 <- firmware revision (0x0 Bits:7-0)
# FADC250_B_REV 0x0908 <- board revision (0x0 Bits:15-8)
# FADC250_ID 0xfadc <- board type (0x0 Bits:31-16)
#
# FADC250_MODE 1 <- process mode: 1-4 (0x10C Bits:2-0)
# FADC250_W_OFFSET 50 <- number of sample back from trigger point. (0x120)
# (in Manual it is PL=Trigger_Window(ns) * 250MHz)
# FADC250_W_WIDTH 49 <- number of ADC sample to include in trigger window. (0x11C)
# (in M: PTW=Trigger_Window(ns) * 250MHz, minimum is 6)
# FADC250_NSB 3 <- number of sample before trigger point to include in data processing. (0x124)
# This include the trigger Point. (minimum is 2 in all mode)
# FADC250_NSA 6 <- number of sample after trigger point to include in data processing. (0x128)
# Minimum is (6 in mode 2) and ( 3 in mode 0 and 1).
# Number of sample report is 1 more for odd and 2 more for even NSA number.
# FADC250_NPEAK 1 <- number of Pulses in Mode 2 and 3. (0x10C Bits:6-5)
#
# 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 - channels ##
# FADC250_ADC_MASK 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 <- channel enable mask (0x110)
# FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- trigger enable mask
# (channel includes in global trigger, if bit set to 1)
# FADC250_TET 110 <- board Trigger Energy Threshold (TET), same for all 16 channels
# FADC250_CH_TET 0 110 <- channel# and TET_value for this channel
# FADC250_ALLCH_TET 111 222 2 3 4 5 6 7 8 9 10 11 12 13 14 15 <- 16 TETs (0x12C - 0x148)
#
# FADC250_DAC 3300 <- board DAC, one and the same for all 16 channels
# FADC250_CH_DAC 0 3300 <- channel# and DAC_value for this channel
# FADC250_ALLCH_DAC 3300 3280 3310 3280 3310 3280 3310 3280 3300 3280 3300 3280 3310 3280 3310 3280 <- 16 DACs
#
# FADC250_PED 210 <- board Pedestals, same for all channels
# FADC250_CH_PED 0 210 <- channel# and Pedestal_value for this channel
# FADC250_ALLCH_PED 210 220 210 215 215 220 220 210 210 215 215 220 220 210 215 220 <- 16 PEDs
CRATE rocfcal3
############################
FADC250_SLOTS 3
#########################
FADC250_ALLCH_DAC 3355 3353 3370 3367 3393 3359 3384 3365 3372 3358 3367 3365 3371 3373 3383 3383
############################
FADC250_SLOTS 4
#########################
FADC250_ALLCH_DAC 3400 3367 3363 3377 3377 3364 3376 3376 3367 3361 3349 3355 3393 3358 3369 3379
############################
FADC250_SLOTS 5
#########################
FADC250_ALLCH_DAC 3349 3366 3369 3351 3369 3352 3363 3364 3371 3367 3354 3360 3371 3370 3350 3377
############################
FADC250_SLOTS 6
#########################
FADC250_ALLCH_DAC 3379 3387 3355 3358 3353 3387 3331 3354 3368 3358 3365 3369 3329 3404 3351 3375
############################
FADC250_SLOTS 7
#########################
FADC250_ALLCH_DAC 3356 3367 3361 3372 3363 3362 3375 3353 3382 3400 3333 3361 3350 3366 3366 3357
############################
FADC250_SLOTS 8
#########################
FADC250_ALLCH_DAC 3377 3395 3344 3373 3365 3347 3377 3377 3370 3381 3393 3377 3364 3381 3377 3386
############################
FADC250_SLOTS 9
#########################
FADC250_ALLCH_DAC 3343 3363 3354 3356 3361 3375 3353 3356 3363 3354 3352 3379 3382 3370 3355 3364
############################
FADC250_SLOTS 10
#########################
FADC250_ALLCH_DAC 3375 3383 3393 3387 3387 3409 3391 3379 3383 3375 3383 3361 3382 3396 3382 3377
############################
FADC250_SLOTS 13
#########################
FADC250_ALLCH_DAC 3356 3381 3378 3364 3364 3377 3376 3375 3317 3384 3366 3377 3352 3363 3359 3377
############################
FADC250_SLOTS 14
#########################
FADC250_ALLCH_DAC 3373 3356 3346 3341 3377 3350 3354 3339 3372 3374 3357 3361 3347 3346 3349 3342
############################
FADC250_SLOTS 15
#########################
FADC250_ALLCH_DAC 3388 3377 3343 3375 3349 3373 3350 3365 3356 3382 3388 3363 3356 3366 3375 3353
############################
FADC250_SLOTS 16
#########################
FADC250_ALLCH_DAC 3367 3346 3352 3347 3353 3351 3325 3354 3371 3373 3345 3374 3345 3352 3327 3351
############################
FADC250_SLOTS 17
#########################
FADC250_ALLCH_DAC 3355 3353 3362 3389 3372 3371 3347 3344 3379 3375 3404 3370 3367 3352 3356 3382
############################
FADC250_SLOTS 18
#########################
FADC250_ALLCH_DAC 3363 3367 3372 3370 3375 3379 3380 3385 3378 3377 3385 3390 3403 3403 3386 3391
############################
FADC250_SLOTS 19
#########################
FADC250_ALLCH_DAC 3389 3365 3354 3362 3378 3368 3354 3328 3352 3360 3352 3349 3347 3354 3359 3370