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/gluondaqfs/hdops/CDAQ/daq_dev_v0.31/daq/config/hd_all/TRG_CDC_BUSY_r62355.conf DB id=18959 Raw

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#! Run type::  PULSER    Config::  TRG_PULSER_raw_b1.conf
#! OUTPUT NAME:: /home/hdops/CDAQ/daq_dev_v0.31/daq/config/hd_all/TRG_PULSER_raw_b1.conf
#! (Re)Created:: on  Tue Jun 28 11:26:50 EDT 2016
#!
#  DSC2_WIDTH      20  40     <- TDC width (ns),   TRG width (ns)
#  DSC2_THRESHOLD  20  50     <- board threshold:  TDC threshold (mV), TRG threshold (mV)
#
#  TS_TRIG_TYPE  1  -  Internal Pulser
#                2  -  External FP
#                4  -  GTP
#                6  -  GTP + External
#
#
#  TS_FP_INPUTS  - List of enabled  FP  inputs
#   
#
#  TS_SOFT_TRIG
#    Trigger type (type 1 or 2 for playback)
#    Number of events to trigger
#    Period multiplier (depends on range 0-0x7FFF)
#    Range 1  -   min  120ns, increments of 30ns up to 983.13u
#          2  -   min  120ns, increments of 30.72us up to 1.007s
#
#
#  TI_MASTER 1 - Stand alone with master TI
#
#  TI_MASTER_TRIG 1 - soft, 2 - external pulser, 3 - playback
#
#  TI_SOFT_TRIG
#    Trigger type (type 1 or 2 for playback)
#    Number of events to trigger
#    Period multiplier (depends on range 0-0x7FFF)
#    Range 1  -   min  120ns, increments of 30ns up to 983.13u
#          2  -   min  120ns, increments of 30.72us up to 1.007s
#
#  F1TDC_CLOCK     0       <- Clock Source (0 = Internal 32 MHz)
#                                       (1 = External 31.25 MHz)
#  F1TDC_VERSION   2       <- Module Version (2 = High Resolution, synchronous, 32 channels)
#                                         (3 = Normal Resolution, synchronous, 48 channels)
# set bin size from 0.056 to 0.058 -> Beni!
#  F1TDC_BIN_SIZE  0.058   <- Bin size (ns)
#  F1TDC_LATENCY   3000.0  <- Trigger latency (ns)
#  F1TDC_WINDOW    1000.0  <- Trigger window (ns)



==========================
        TRIGGER
==========================

CALIBRATION   0

TS_FP_DELAY   3   427


# PMT 100 kHz
#TS_TRIG_TYPE  2
#TS_FP_INPUTS  4


# random 256 kHz   |  1=256  2=128  3=64  4=32 5=16 6=8
TS_TRIG_TYPE  1
TS_SOFT_TRIG  1  64000   2  2

#TS_SOFT_TRIG  1  20000   0x4F  1

# fixed freq.
#TS_TRIG_TYPE  1
#TS_SOFT_TRIG  1  555   0x4FFF  1
#TS_SOFT_TRIG  1  64000   0x7FFF  1

TS_TD_SLOTS  10  3  6  4  9  7  8  5  

# SSP      SLOT      FIBER_EN    SUM_ENABLE

#SSP_SLOT     8         0xFF        1

#            TYPE       DELAY     INT_WIDTH     ENABLE

TRIG_EQ      PS          20         10           0
TRIG_EQ      BCAL_E      20         20           0
TRIG_EQ      BCAL_C      20         10           0
TRIG_EQ      FCAL        20         10           0
TRIG_EQ      ST          20         10           0
TRIG_EQ      TOF         20         10           0


#            TYPE      LATENCY     WIDTH     FCAL_E    BCAL_E     EN_THR  NHIT  LANE

TRIG_TYPE     PS          420        20       1300      1900       1100    0    -1 
TRIG_TYPE     BFCAL       452        20       0            1       2000    0    -1
TRIG_TYPE     BCAL_COS    440        40       1500      2100       1300    0    -1

#TS_GTP_PRES  0  1

#TS_TRIG_HOLD 1   32  0
#TS_TRIG_HOLD 2  127  0
#if busy=3 t=~2us
# TEST 2, THR = 3

TS_TRIG_HOLD  1  10    0
TS_TRIG_HOLD  2  127   0
TS_TRIG_HOLD  4  40    0
TS_TRIG_HOLD  3  2     1

#TS_TRIG_HOLD 3  127  0
#if busy=2 , t=~4um

TRIG_DELAY  0 
DAC_CALIB   0 

TI_FIBER_LATENCY_OFFSET  0x98

TI_MASTER  0

TI_MASTER_TRIG  1

TI_FP_INPUTS 3

# TI_SOFT_TRIG  1  10000   0x7FFF   1

TI_SOFT_TRIG  1  10000   0x600   1

TI_FIBER_EN  

#TS_SYNC_INT  500000

#BLOCKLEVEL 1
#BUFFERLEVEL 1
BLOCKLEVEL   40
BUFFERLEVEL  4

==========================
        GLOBAL  
==========================

F1TDC_BIN_SIZE   0.058

FADC125_BUSY 3
FADC250_BUSY 4

-------------------------------------------------------------------
# use file::  -rw-rw-r-- 1 hdops hdops 712 Apr 21 14:17 /home/hdops/CDAQ/daq_dev_v0.31/daq/config/hd_all/master_config/CDC.master
==========================
         CDC
==========================
# FADC125_MODE can be:
#   3 = CDC_short       6 = CDC_long
#   4 = FDC_short       7 = FDC_sum_long
#   5 = FDC_amp_short   8 = FDC_amp_long

FADC125_MODE         3
FADC125_W_OFFSET     425
FADC125_W_WIDTH      200
FADC125_IE           200
FADC125_NPEAK        1

FADC125_PG          4
FADC125_P1          4
FADC125_P2          4

FADC125_IBIT        4
FADC125_ABIT        3
FADC125_PBIT        0

FADC125_TH          60
FADC125_TL          20

FADC125_THR         500
FADC125_DAC         800

#FADC125_COM_DIR      /gluex/CALIB/ALL/fadc125/default
#FADC125_COM_VER      default
# New calibration from Beni 11/22/2017
FADC125_COM_DIR        /gluex/CALIB/ALL/fadc125/fall2017
FADC125_COM_VER        fall2017B
#FADC125_COM_DIR        /gluex/CALIB/ALL/fadc125
#FADC125_COM_VER        Run_62140

FADC125_USER_DIR     /gluex/
FADC125_USER_VER    



==========================
         FDC
==========================
# CDC_short      3
# CDC_long       6
# FDC_short      4
# FDC_amp_short  5 
# FDC_sum_long   7
# FDC_amp_long   8

FADC125_MODE           5
FADC125_W_OFFSET     460
FADC125_W_WIDTH      100
FADC125_IE            16
FADC125_NPEAK        1

FADC125_PG          4
FADC125_P1          4
FADC125_P2          4

FADC125_IBIT        4
FADC125_ABIT        0
FADC125_PBIT        0

FADC125_TH          40
FADC125_TL          10

FADC125_THR         70
FADC125_DAC         800

#FADC125_COM_DIR      /gluex/CALIB/ALL/fadc125/default
#FADC125_COM_VER      default
# New calibration from Beni 11/22/2017
FADC125_COM_DIR        /gluex/CALIB/ALL/fadc125/fall2017
FADC125_COM_VER        fall2017B
#FADC125_COM_DIR        /gluex/CALIB/ALL/fadc125
#FADC125_COM_VER        Run_62355


FADC125_USER_DIR     /gluex/
FADC125_USER_VER    

#  F1 TDC
# change latency and window back to what we expect from ADCs (Beni) 
F1TDC_WINDOW     1400. 
F1TDC_LATENCY    3560.
#F1TDC_BIN_SIZE   0.112

# High-resolution board in slot 17
# changed by Beni (loser) 2014.10.6
F1TDC_HR_WINDOW     1000.
F1TDC_HR_LATENCY    1160.
# set bin size from 0.056 to 0.058 -> Beni!
#F1TDC_HR_BIN_SIZE   0.058


F1TDC_CLOCK     1

==========================
         BCAL   
==========================

FADC250_MODE         9
FADC250_W_OFFSET     205
FADC250_W_WIDTH      100
FADC250_NSB          1
FADC250_NSA          26
FADC250_NPEAK        1

FADC250_READ_THR     106

FADC250_TRIG_BL      100
FADC250_TRIG_THR     110
FADC250_TRIG_NSB     3
FADC250_TRIG_NSA     19

#FADC250_COM_DIR     /gluex/CALIB/ALL/fadc250/default
#FADC250_COM_VER     default
FADC250_COM_DIR     /gluex/CALIB/ALL/fadc250
FADC250_COM_VER     Run_62355


FADC250_USER_DIR    /home/
FADC250_USER_VER    


#  F1 TDC

F1TDC_WINDOW     500.
F1TDC_LATENCY    900.
#F1TDC_BIN_SIZE   0.058

F1TDC_CLOCK     1

#  LE discriminator

DSC2_WIDTH       40   40 
DSC2_THRESHOLD   45   50

DSC2_COM_DIR      /gluex/CALIB/ALL/dsc/default
DSC2_COM_VER      default


==========================
         FCAL   
==========================

FADC250_MODE         9
FADC250_W_OFFSET     860
FADC250_W_WIDTH      100
FADC250_NSB          1
FADC250_NSA          15 
FADC250_NPEAK        3

FADC250_READ_THR      105

FADC250_TRIG_BL      100
FADC250_TRIG_THR     165
FADC250_TRIG_NSB     3
FADC250_TRIG_NSA     10

#FADC250_COM_DIR      /gluex/CALIB/ALL/fadc250/default
#FADC250_COM_VER      default
FADC250_COM_DIR     /gluex/CALIB/ALL/fadc250
FADC250_COM_VER     Run_62355

FADC250_USER_DIR     /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2016
FADC250_USER_VER     ring2_hot_v2

==========================
         TOF   
==========================
# change latency and width from 510/200 to 910/100
# and change NSB and NSA from 3/6 to 5/20
# btw. it is BENI
# changed NSB & NSA from 5/20 to 10/45  (eugenio)
FADC250_MODE         9
FADC250_W_OFFSET     810
FADC250_W_WIDTH      80
FADC250_NSB          1
FADC250_NSA          10
FADC250_NPEAK        3

FADC250_READ_THR     160

FADC250_TRIG_BL      100
FADC250_TRIG_THR     110 
FADC250_TRIG_NSB     3
FADC250_TRIG_NSA     15



#FADC250_COM_DIR      /gluex/CALIB/ALL/fadc250/default
#FADC250_COM_VER      default
FADC250_COM_DIR     /gluex/CALIB/ALL/fadc250
FADC250_COM_VER     Run_62355

FADC250_USER_DIR    /home/
FADC250_USER_VER    

# CTP_BCAL_THR   56000


#  LE discriminator

DSC2_WIDTH       20  40 
DSC2_THRESHOLD   30  50


#  CAEN 1290

#TDC1290_W_WIDTH    750
TDC1290_W_WIDTH    3800
#TDC1290_W_OFFSET -1750
#TDC1290_W_OFFSET -3640
TDC1290_W_OFFSET -3660
TDC1290_W_EXTRA    25
TDC1290_W_REJECT   50


TDC1290_BLT_EVENTS 1
TDC1290_N_HITS     64
TDC1290_ALMOSTFULL 16384
TDC1290_OUT_PROG   2

TDC1290_A24_A32    2
TDC1290_SNGL_BLT   3
TDC1290_SST_RATE   0
TDC1290_BERR_FIFO  1

TDC1290_EDGE       2

==========================
        PSC  
==========================

FADC250_MODE         9
FADC250_W_OFFSET     880
FADC250_W_WIDTH      100
FADC250_NSB          3
FADC250_NSA          6
FADC250_NPEAK        3

FADC250_READ_THR     150

FADC250_TRIG_BL      100
FADC250_TRIG_THR     150
FADC250_TRIG_NSB     3
FADC250_TRIG_NSA     6

#  F1 TDC

F1TDC_WINDOW     600
F1TDC_LATENCY    3660
F1TDC_CLOCK     1


#  LE discriminator

DSC2_WIDTH       40   40 
DSC2_THRESHOLD   40   40


==========================
        TPOL  
==========================

FADC250_MODE         9
FADC250_W_OFFSET     825
FADC250_W_WIDTH      150
FADC250_NSB          3
FADC250_NSA          10
FADC250_NPEAK        1

FADC250_READ_THR     133

FADC250_TRIG_BL      100
FADC250_TRIG_THR     500
FADC250_TRIG_NSB     3
FADC250_TRIG_NSA     6


==========================
        PS  
==========================

FADC250_MODE         9
FADC250_W_OFFSET     880
FADC250_W_WIDTH      100
FADC250_NSB          3
FADC250_NSA          10
FADC250_NPEAK        3

FADC250_READ_THR     130

FADC250_TRIG_BL      100
FADC250_TRIG_THR     200
FADC250_TRIG_NSB     3
FADC250_TRIG_NSA     15

#FADC250_COM_DIR      /gluex/CALIB/ALL/fadc250/default
#FADC250_COM_VER      test
FADC250_COM_DIR     /gluex/CALIB/ALL/fadc250
FADC250_COM_VER     Run_62355

FADC250_USER_DIR    /home/somov/conf/cosmic
FADC250_USER_VER    
==========================
         TAGM  
==========================

FADC250_MODE         9
#FADC250_W_OFFSET     895
FADC250_W_OFFSET     915
FADC250_W_WIDTH      100
FADC250_NSB          3
FADC250_NSA          6
FADC250_NPEAK        3


# For low gain mode
#FADC250_READ_THR     115 #(early spring 2016)
#FADC250_READ_THR     250 # 4/9/16 aeb
# For high gain mode
#FADC250_READ_THR     180   #(change 3/30/2016 by RTJ)
#FADC250_READ_THR     140
FADC250_READ_THR     200 # (new defaults 4/21/16 by AEB)

FADC250_TRIG_BL      100
#FADC250_TRIG_THR     210
FADC250_TRIG_THR     400 # (new defaults 4/21/16 by AEB)
FADC250_TRIG_NSB     3
FADC250_TRIG_NSA     15


#FADC250_COM_DIR      /gluex/CALIB/ALL/fadc250/default
#FADC250_COM_VER      default
FADC250_COM_DIR     /gluex/CALIB/ALL/fadc250
FADC250_COM_VER     Run_62355

FADC250_USER_DIR    /gluex/Subsystems/TAGM/calib
FADC250_USER_VER    test_v1

#FADC250_USER_DIR    /home/
#FADC250_USER_VER  

CTP_USE   0

#  F1 TDC

F1TDC_WINDOW     600.
F1TDC_LATENCY    3700.

F1TDC_CLOCK     1

#  LE discriminator
# Change for high gain mode

DSC2_WIDTH        40   40
#DSC2_THRESHOLD    20  20  (changed 2/10/16 by A.B.)
#DSC2_THRESHOLD    5    5  (changed for diamond alignment 2/20/16)
#DSC2_THRESHOLD    12    12 
#DSC2_THRESHOLD    100    150  #(changed 3/30/2016 by RTJ)
DSC2_THRESHOLD    80    80  #(changed 4/21/2016 by aeb)


==========================
         TAGH  
==========================

FADC250_MODE         9
FADC250_W_OFFSET     915
FADC250_W_WIDTH      100
FADC250_NSB          3
FADC250_NSA          6
FADC250_NPEAK        3
# changed from 120 to 300
FADC250_READ_THR     300

FADC250_TRIG_BL      100
FADC250_TRIG_THR     300
FADC250_TRIG_NSB     3
FADC250_TRIG_NSA     6


#FADC250_COM_DIR      /gluex/CALIB/ALL/fadc250/default
#FADC250_COM_VER      default
FADC250_COM_DIR     /gluex/CALIB/ALL/fadc250
FADC250_COM_VER     Run_62355

FADC250_USER_DIR    /home/
FADC250_USER_VER    

CTP_USE   0

#  F1 TDC

F1TDC_WINDOW     600.
F1TDC_LATENCY    3700.

F1TDC_CLOCK     1

#  LE discriminator

DSC2_WIDTH       40   40 
DSC2_THRESHOLD   45   45


==========================
         ST   
==========================
#change latency to 925 by BENI
# also change NSA and NSB from 3/6 to 5/20
FADC250_MODE         9
# FADC250_W_OFFSET     824
FADC250_W_OFFSET     860
FADC250_W_WIDTH      100
FADC250_NSB          5
FADC250_NSA          20
FADC250_NPEAK        3

# change FADC250_READ_THR from 800 -> 110 by pooser (5 mV)
# change FADC250_READ_THR from 110 -> 120 by pooser (10 mV)
FADC250_READ_THR     120

FADC250_TRIG_BL      100
FADC250_TRIG_THR     300
FADC250_TRIG_NSB     3
FADC250_TRIG_NSA     15


#FADC250_COM_DIR      /gluex/CALIB/ALL/fadc250/default
#FADC250_COM_VER      default
FADC250_COM_DIR     /gluex/CALIB/ALL/fadc250
FADC250_COM_VER     Run_62355

FADC250_USER_DIR    /home/
FADC250_USER_VER    

#  F1 TDC
# change latency from 2100 to 3700
F1TDC_WINDOW     1000.
F1TDC_LATENCY    3460.

F1TDC_CLOCK     1

#  LE discriminator

# change DSC2_THRESHOLD from 100 -> 50 by pooser
DSC2_WIDTH       40   40 
DSC2_THRESHOLD   50   60



==========================
         TOF   
==========================
FADC250_MODE         9
FADC250_W_OFFSET     810
FADC250_W_WIDTH      100
FADC250_NSB          1
FADC250_NSA          25
FADC250_NPEAK        3

FADC250_READ_THR     110

FADC250_TRIG_BL      100
FADC250_TRIG_THR     110 
FADC250_TRIG_NSB     3
FADC250_TRIG_NSA     15



#FADC250_COM_DIR      /gluex/CALIB/ALL/fadc250/default
#FADC250_COM_VER      default
FADC250_COM_DIR     /gluex/CALIB/ALL/fadc250
FADC250_COM_VER     Run_62355

FADC250_USER_DIR    /home/
FADC250_USER_VER    


#  LE discriminator

DSC2_WIDTH       10  10 
DSC2_THRESHOLD   42  42


#  CAEN 1290

#TDC1290_W_WIDTH    750
TDC1290_W_WIDTH    3800
#TDC1290_W_OFFSET -1750
#TDC1290_W_OFFSET -3640
TDC1290_W_OFFSET -3660
TDC1290_W_EXTRA    25
TDC1290_W_REJECT   50


TDC1290_BLT_EVENTS 1
TDC1290_N_HITS     64
TDC1290_ALMOSTFULL 16384
TDC1290_OUT_PROG   2

TDC1290_A24_A32    2
TDC1290_SNGL_BLT   3
TDC1290_SST_RATE   0
TDC1290_BERR_FIFO  1

TDC1290_EDGE       2


# TDC1290_RC  SLOT  CHIP  TAP1  TAP2  TAP3  TAP4

 TDC1290_RC  3   0   5   1   4   3
 TDC1290_RC  3   1   5   5   1   3
 TDC1290_RC  3   2   7   2   7   4
 TDC1290_RC  3   3   2   2   7   7
 TDC1290_RC  4   0   0   1   6   3
 TDC1290_RC  4   1   0   6   1   4
 TDC1290_RC  4   2   3   2   0   3
 TDC1290_RC  4   3   1   1   5   7
 TDC1290_RC  5   0   6   0   1   6
 TDC1290_RC  5   1   5   4   1   6
 TDC1290_RC  5   2   2   1   2   3
 TDC1290_RC  5   3   3   1   7   5
 TDC1290_RC  6   0   1   4   6   6
 TDC1290_RC  6   1   2   5   0   6
 TDC1290_RC  6   2   7   0   7   5
 TDC1290_RC  6   3   5   7   1   3
 TDC1290_RC  7   0   3   1   6   6
 TDC1290_RC  7   1   3   0   3   3
 TDC1290_RC  7   2   7   4   1   3
 TDC1290_RC  7   3   0   2   7   7
 TDC1290_RC  8   0   7   7   0   4
 TDC1290_RC  8   1   5   1   7   7
 TDC1290_RC  8   2   3   0   4   2
 TDC1290_RC  8   3   0   0   0   4