Content:
#! Run type:: PHYSICS_8 Config:: TRG_FCAL_BCAL_m8_b1bf1.conf
#! CONFIG FILE:: /home/hdops/CDAQ/daq_dev_v0.31/daq/config/hd_all/TRG_FCAL_BCAL_m8_b1bf1.conf
#! (Re)Created:: on Wed Apr 29 12:06:51 EDT 2015
#!
# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)
# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)
#
# TS_TRIG_TYPE 1 - Internal Pulser
# 2 - External FP
# 4 - GTP
# 6 - GTP + External
#
#
# TS_FP_INPUTS - List of enabled FP inputs
#
#
# TS_SOFT_TRIG
# Trigger type (type 1 or 2 for playback)
# Number of events to trigger
# Period multiplier (depends on range 0-0x7FFF)
# Range 1 - min 120ns, increments of 30ns up to 983.13u
# 2 - min 120ns, increments of 30.72us up to 1.007s
#
#
# TI_MASTER 1 - Stand alone with master TI
#
# TI_MASTER_TRIG 1 - soft, 2 - external pulser, 3 - playback
#
# TI_SOFT_TRIG
# Trigger type (type 1 or 2 for playback)
# Number of events to trigger
# Period multiplier (depends on range 0-0x7FFF)
# Range 1 - min 120ns, increments of 30ns up to 983.13u
# 2 - min 120ns, increments of 30.72us up to 1.007s
#
# F1TDC_CLOCK 0 <- Clock Source (0 = Internal 32 MHz)
# (1 = External 31.25 MHz)
# F1TDC_VERSION 2 <- Module Version (2 = High Resolution, synchronous, 32 channels)
# (3 = Normal Resolution, synchronous, 48 channels)
# set bin size from 0.056 to 0.058 -> Beni!
# F1TDC_BIN_SIZE 0.058 <- Bin size (ns)
# F1TDC_LATENCY 3000.0 <- Trigger latency (ns)
# F1TDC_WINDOW 1000.0 <- Trigger window (ns)
==========================
TRIGGER
==========================
#CALIBRATION 1
# TS_TRIG_TYPE 2
TS_TRIG_TYPE 6
# TS_FP_INPUTS 5 6
# TS_FP_INPUTS 3 9 10 12 15
TS_FP_INPUTS 3 5 6 9 10 12 15
TS_FP_DELAY 5 417
TS_FP_DELAY 6 370
#TS_FP_DELAY 9 24
#TS_FP_DELAY 10 50
#TS_FP_DELAY 9 27
#TS_FP_DELAY 10 53
#04/15/2016
#TS_FP_DELAY 9 23
#TS_FP_DELAY 10 44
#11/1/2018
TS_FP_DELAY 9 23
TS_FP_DELAY 10 21
TS_FP_DELAY 3 427
TS_FP_DELAY 15 417
TS_SOFT_TRIG 1 0 0x1F 1
TS_TD_SLOTS 10 3 6 4 9 7 8 5 14
#Remove some test debuging
# SSP SLOT FIBER_EN SUM_ENABLE
SSP_SLOT 8 0xFF 1
# SSP_SLOT 9 0x0 1
# SSP_SLOT 10 0x0 1
SSP_SLOT 9 0x2F 1
SSP_SLOT 10 0x3D 1
SSP_SLOT 14 0x7F 1
SSP_SLOT 15 0x0 1
#PS
SSP_SLOT 5 0x02 0
# ST
# SSP_SLOT 6 0x1 0
# TAGH
# SSP_SLOT 4 0x1 0
# TYPE DELAY INT_WIDTH ENABLE
# Spring 2017 initial
# TRIG_EQ BCAL_E 15 20 1
TRIG_EQ PS 35 10 1
TRIG_EQ BCAL_E 12 20 1
TRIG_EQ BCAL_C 20 0 0
TRIG_EQ FCAL 8 10 1
TRIG_EQ ECAL 8 15 1
TRIG_EQ ST 31 3 0
TRIG_EQ TOF 20 10 0
TRIG_EQ CCAL 4 15 0
# Change ST time to from 30 to 31 and TAGH delay from 105 to 106
TRIG_EQ TAGH 106 0 0
# TRIG_EQ BCAL_E 20 20 1
# TRIG_EQ FCAL 8 10 1
# TRIG_ECAL_FCAL_GAIN 1. 0.
# TRIG_ECAL_FCAL_GAIN 1. 0.8
# TRIG_ECAL_FCAL_GAIN 1. 0.5
# TRIG_ECAL_FCAL_GAIN 0. 0.8
TRIG_ECAL_FCAL_GAIN 1. 0.4957
# TRIG_ECAL_FCAL_GAIN 0. 0.4957
# TRIG_ECAL_FCAL_GAIN 1. 0.
# TYPE LATENCY WIDTH FCAL_E BCAL_E EN_THR NHIT LANE FCAL_EMIN FCAL_EMAX BCAL_EMIN BCAL_EMAX PATTERN
# TRIG_TYPE BFCAL 440 5 10 2 18000 0 0 200 65535 0 65535
# TRIG_TYPE BFCAL 440 5 25 1 45000 0 0 200 65535 0 65535
# ALEX 12/19/2017 START WITHOUT THESE TRIGGERS
# ALEX Enable 4/29/2018
TRIG_TYPE BFCAL 440 5 25 1 45000 0 -7 200 65535 0 65535
TRIG_TYPE ST 440 5 1300 1900 1100 1 -7
# TRIG_TYPE TAGH 440 4 1 1 1100 1 8 0 65535 0 65535 0xF000
# TRIG_TYPE ST 440 4 1300 1900 1100 1 8
# Production with the ECAL and BCAL triggers
# TRIG_TYPE BFCAL 440 5 1 0 1200 0 -1 0 65535 0 65535
# TRIG_TYPE BFCAL 440 5 1 0 900 0 0 0 65535 0 65535
# 04/28/2025
# TRIG_TYPE BFCAL 440 5 1 0 1400 0 0 0 65535 0 65535
TRIG_TYPE BFCAL 440 5 35 1 45000 0 0 200 65535 0 65535
TRIG_TYPE BFCAL 440 5 0 1 45000 0 2
TRIG_TYPE BFCAL 440 5 0 1 25000 0 -2
# Changed 03/31/16
#TRIG_TYPE BFCAL 440 5 0 1 18000 0 2
TRIG_TYPE PS 440 5 1300 1900 1100 0 3
TRIG_TYPE BFCAL 440 5 20 1 36000 0 -5 200 65535 0 65535
TRIG_TYPE BFCAL 440 5 1 0 900 0 -6
TRIG_TYPE ST 440 5 1300 1900 1100 1 -6
TRIG_TYPE BCAL_COS 440 40 1500 2100 1300 0 -1
#Removed some test debuging
# TS_GTP_PRES 0 11
# TS_GTP_PRES 2 11
# TS_GTP_PRES 3 11
# TS_GTP_PRES 8 1
# TS_GTP_PRES 8 7
#TS_GTP_PRES 0 10
#TS_GTP_PRES 2 10
#TS_GTP_PRES 2 2
#TS_GTP_PRES 3 2
#TS_GTP_PRES 0 10
#TS_GTP_PRES 1 5
#TS_GTP_PRES 2 5
# TS_GTP_PRES 2 3
TRIG_DELAY 0
DAC_CALIB 0
TI_FIBER_LATENCY_OFFSET 0x98
TS_COIN_WIND 15
# TEST 2, THR = 3
TS_TRIG_HOLD 1 10 0
TS_TRIG_HOLD 2 127 0
TS_TRIG_HOLD 4 40 0
TS_TRIG_HOLD 3 2 1
# TS_SYNC_INT 1000
# 2/7/16 changed to 5000
TS_SYNC_INT 5000
TI_MASTER 0
TI_MASTER_TRIG 1
TI_FP_INPUTS 3
# TI_SOFT_TRIG 1 10000 0x7FFF 1
TI_SOFT_TRIG 1 10000 0x600 1
BLOCKLEVEL 40
BUFFERLEVEL 4
==========================
GLOBAL
==========================
F1TDC_BIN_SIZE 0.058
FADC250_BUSY 3
FADC125_BUSY 3
FADC250_FORMAT 2
FADC125_FORMAT 1
==========================
ECAL
==========================
FADC250_MODE 9
# FADC250_W_OFFSET 705
# FADC250_W_WIDTH 300
# FADC250_W_OFFSET 455
# FADC250_W_OFFSET 550
# Original
# FADC250_W_OFFSET 430
# FADC250_W_OFFSET 440
# 04/17/2025
# FADC250_W_OFFSET 835
FADC250_W_OFFSET 800
FADC250_W_WIDTH 100
FADC250_NSB 1
FADC250_NSA 15
FADC250_NPEAK 3
FADC250_NSAT 2
FADC250_READ_THR 106
# Most production
# FADC250_READ_THR 105
# FADC250_READ_THR 104
FADC250_TRIG_BL 100
FADC250_TRIG_THR 135
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 10
FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default
FADC250_COM_VER default
CTP_USE 0
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2025
# FADC250_USER_VER ring1_hot_v1
FADC250_USER_DIR /gluonfs1/gluex/CALIB/ECAL/fadc250/user/spring_2025
FADC250_USER_VER ring4_hot_v1
==========================
FCAL
==========================
FADC250_MODE 9
# FADC250_W_OFFSET 820
# Changed from 820 to 805 (12/15/16)
#ORIG 2025
# FADC250_W_OFFSET 805
FADC250_W_OFFSET 825
#FADC250_W_WIDTH 100
# Changed from 100 to 70 (12/17/2016)
# 04/17/2025
# FADC250_W_OFFSET 790
FADC250_W_OFFSET 795
FADC250_W_WIDTH 100
FADC250_NSB 1
FADC250_NSA 15
FADC250_NPEAK 3
FADC250_NSAT 2
FADC250_READ_THR 108
FADC250_TRIG_BL 100
FADC250_TRIG_THR 165
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 10
FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default
FADC250_COM_VER default
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2016
# FADC250_USER_VER ring4_hot_v1
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2016
# FADC250_USER_VER ring3_hot_v1
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2016
# FADC250_USER_VER ring2_hot_v1
# Used in the begining of production in spring 2017
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2016
# FADC250_USER_VER ring2_hot_v2
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2016
# FADC250_USER_VER ring1_hot_v1
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2016
# FADC250_USER_VER ring_hot_v1
# Latest from spring 2017
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2017
# FADC250_USER_VER ring2_hot_v2
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2018
# FADC250_USER_VER ring2_hot_v1
# Changed by Alex on 1/24/18
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2018
# FADC250_USER_VER ring2_hot_v2
# Changed by Alex on 4/7/18
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2018
# FADC250_USER_VER ring2_hot_v3
# Changed by Alex on 12/4/19
FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/fall_2019
FADC250_USER_VER ring2_hot_v3
# Alex Test
# FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/fall_2018
# FADC250_USER_VER ring2_hot_v1
==========================
BCAL
==========================
# change offset from 905 to 885 -> Beni 6.10.2014 afternoon
# also change NSB and NSA from 3/6 to 5/40
FADC250_MODE 9
# Changed from 825 to 820 (2/26/15)
# FADC250_W_OFFSET 820
# Changed from 820 to 815 (12/15/16)
FADC250_W_OFFSET 815
# MMD 2017-01-27
FADC250_W_WIDTH 100
FADC250_NSB 1
FADC250_NSA 26
FADC250_NPEAK 1
FADC250_NSAT 2
# MMD threshold from 110 to 105 (2014-12-05)
FADC250_READ_THR 105
FADC250_TRIG_BL 100
FADC250_TRIG_THR 120
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 19
FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default
FADC250_COM_VER default
FADC250_USER_DIR /gluex/CALIB/ALL/user
FADC250_USER_VER
# F1 TDC
#change latency from 900. to 3540. and window from 500 to 1000 ->Beni
# F1TDC_WINDOW 1000.
# Changed from 1000 to 400 (12/17/2016)
F1TDC_WINDOW 400.
F1TDC_LATENCY 3400.
# set bin size from 0.056 to 0.058 -> Beni!
F1TDC_CLOCK 1
# LE discriminator
DSC2_WIDTH 20 40
DSC2_THRESHOLD 35 50
DSC2_COM_DIR /gluex/CALIB/ALL/dsc/default
DSC2_COM_VER default
==========================
TOF
==========================
# change latency and width from 510/200 to 910/100
# and change NSB and NSA from 3/6 to 5/20
# btw. it is BENI
# changed NSB & NSA from 5/20 to 10/45 (eugenio)
FADC250_MODE 9
# FADC250_W_OFFSET 810
# Changed from 820 to 815 (12/15/16)
# change from 800 to 775 I think 1 unit is 4ns
# 775 was wrong direction go to 825
#FADC250_W_OFFSET 825
# change Window offset from 825 to 795: B.Z. 2025/04/29
FADC250_W_OFFSET 795
# FADC250_W_WIDTH 100
# Changed from 100 to 70 (12/17/2016)
# Changed from 70 to 80 (02/01/2017)
# inrease the window size to 100 I think 1 unit is 4ns
#FADC250_W_WIDTH 100
# change Window size from 100 back to 80: B.Z. 2025/04/29
FADC250_W_WIDTH 80
FADC250_NSB 1
FADC250_NSA 10
# change NPEAK from 3 to 4: B.Z. 2025/04/29
#FADC250_NPEAK 3
FADC250_NPEAK 4
FADC250_NSAT 2
FADC250_READ_THR 160
FADC250_TRIG_BL 100
FADC250_TRIG_THR 110
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 15
FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default
FADC250_COM_VER default
FADC250_USER_DIR /home/
FADC250_USER_VER
# CTP_BCAL_THR 56000
# LE discriminator
DSC2_WIDTH 20 40
# Default
DSC2_THRESHOLD -12 -12
DSC2_COM_DIR /gluex/CALIB/ALL/dsc/default
DSC2_COM_VER default
# CAEN 1290
#TDC1290_W_WIDTH 750
#TDC1290_W_WIDTH 3800
# Changed TDC1290_W_WIDTH from 3800 to 1000 (12/17/2016)
# Changed TDC1290_W_WIDTH from 1000 to 800 (02/01/2017)
# Changed TDC1290_W_WIDTH from 800 to 400 (01/27/2020)
# change W_Width from 800 to 435: B.Z. 2025/04/29
TDC1290_W_WIDTH 435
#TDC1290_W_OFFSET -1750
#TDC1290_W_OFFSET -3640
# change TDC1290_W_OFFSET from -3660 to -3410 (01/27/2020)
# change by another +100
# change W_OFFSET from -3510 to -3620: B.Z. 2025/04/29
# that was the wrong direction need to go to -3400
TDC1290_W_OFFSET -3400
TDC1290_W_EXTRA 25
TDC1290_W_REJECT 50
TDC1290_BLT_EVENTS 1
TDC1290_N_HITS 64
TDC1290_ALMOSTFULL 16384
TDC1290_OUT_PROG 2
TDC1290_A24_A32 2
TDC1290_SNGL_BLT 3
TDC1290_SST_RATE 0
TDC1290_BERR_FIFO 1
TDC1290_EDGE 2
TDC1290_INL 1
# TDC1290_RC SLOT CHIP TAP1 TAP2 TAP3 TAP4
# TDC1290_RC 3 0 5 1 4 3
# TDC1290_RC 3 1 5 5 1 3
# TDC1290_RC 3 2 7 2 7 4
# TDC1290_RC 3 3 2 2 7 7
# TDC1290_RC 4 0 0 1 6 3
# TDC1290_RC 4 1 0 6 1 4
# TDC1290_RC 4 2 3 2 0 3
# TDC1290_RC 4 3 1 1 5 7
# TDC1290_RC 5 0 6 0 1 6
# TDC1290_RC 5 1 5 4 1 6
# TDC1290_RC 5 2 2 1 2 3
# TDC1290_RC 5 3 3 1 7 5
# TDC1290_RC 6 0 1 4 6 6
# TDC1290_RC 6 1 2 5 0 6
# TDC1290_RC 6 2 7 0 7 5
# TDC1290_RC 6 3 5 7 1 3
# TDC1290_RC 7 0 3 1 6 6
# TDC1290_RC 7 1 3 0 3 3
# TDC1290_RC 7 2 7 4 1 3
# TDC1290_RC 7 3 0 2 7 7
# TDC1290_RC 8 0 7 7 0 4
# TDC1290_RC 8 1 5 1 7 7
# TDC1290_RC 8 2 3 0 4 2
# TDC1290_RC 8 3 0 0 0 4
# NEW RC values for the new INL look up tables
# loaded into the CAEN TDCs prior to run period 2025
# this list includes slot 9 which currently is not
# read in by the parser (HARDCODED!)
TDC1290_RC 3 0 4 4 4 7
TDC1290_RC 3 1 4 3 6 7
TDC1290_RC 3 2 7 7 7 7
TDC1290_RC 3 3 4 4 6 1
TDC1290_RC 4 0 6 5 7 6
TDC1290_RC 4 1 2 6 4 7
TDC1290_RC 4 2 3 6 7 5
TDC1290_RC 4 3 1 7 6 4
TDC1290_RC 5 0 5 7 6 4
TDC1290_RC 5 1 2 3 7 7
TDC1290_RC 5 2 6 7 5 6
TDC1290_RC 5 3 7 6 3 7
TDC1290_RC 6 0 6 5 7 7
TDC1290_RC 6 1 7 7 7 5
TDC1290_RC 6 2 6 7 7 7
TDC1290_RC 6 3 6 7 6 6
TDC1290_RC 7 0 6 5 6 4
TDC1290_RC 7 1 3 7 4 5
TDC1290_RC 7 2 7 7 5 5
TDC1290_RC 7 3 3 2 7 3
TDC1290_RC 8 0 1 6 5 2
TDC1290_RC 8 1 6 1 6 4
TDC1290_RC 8 2 2 1 7 2
TDC1290_RC 8 3 5 3 1 7
#TDC1290_RC 9 0 3 3 6 1
#TDC1290_RC 9 1 6 5 5 1
#TDC1290_RC 9 2 5 4 0 6
#TDC1290_RC 9 3 1 2 0 7
==========================
ST
==========================
#change latency to 925 by BENI
# also change NSA and NSB from 3/6 to 5/20
FADC250_MODE 9
#FADC250_W_OFFSET 824
# Changed from 824 to 819 (12/15/16)
# FADC250_W_OFFSET 819
# 1/21/20 A.S. changed from 819 to 822
FADC250_W_OFFSET 822
# FADC250_W_WIDTH 100
# Changed from 100 to 80 (12/17/2016)
FADC250_W_WIDTH 80
# TEST
# FADC250_W_WIDTH 100
FADC250_NSB 5
FADC250_NSA 20
# TEST
# FADC250_NSB 2
# FADC250_NSA 15
FADC250_NPEAK 3
FADC250_NSAT 2
# change FADC250_READ_THR from 800 -> 110 by pooser (5 mV)
# change FADC250_READ_THR from 110 -> 120 by pooser (10 mV)
#change readout threshold from 120 to 180: B.Z. 15/04/2025 10:07am
#change readout threshold from 180 to 160: B.Z. 30/04/2025 11:56am
#FADC250_READ_THR 120
#FADC250_READ_THR 180
FADC250_READ_THR 160
# TEST
# FADC250_READ_THR 105
FADC250_TRIG_BL 100
FADC250_TRIG_THR 300
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 15
FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default
FADC250_COM_VER default
FADC250_USER_DIR /home/
FADC250_USER_VER
# F1 TDC
# change latency from 2100 to 3700
# F1TDC_WINDOW 1000.
# Changed from 1000 to 600 (12/17/2016)
F1TDC_WINDOW 600.
F1TDC_LATENCY 3460.
F1TDC_CLOCK 1
# LE discriminator
# change DSC2_THRESHOLD from 100 -> 50 by pooser
DSC2_WIDTH 20 40
DSC2_THRESHOLD 50 60
==========================
TAGH
==========================
FADC250_MODE 9
# 1/21/20 A.S. changed from 895 to 885
# FADC250_W_OFFSET 895
FADC250_W_OFFSET 885
# FADC250_W_WIDTH 100
# Changed from 100 to 60 (12/17/2016)
FADC250_W_WIDTH 60
FADC250_NSB 3
FADC250_NSA 6
FADC250_NPEAK 3
FADC250_NSAT 2
# changed from 120 to 300
FADC250_READ_THR 300
FADC250_TRIG_BL 100
FADC250_TRIG_THR 300
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 6
FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default
FADC250_COM_VER default
FADC250_USER_DIR /home/
FADC250_USER_VER
# CTP_USE 0
# F1 TDC
# F1TDC_WINDOW 600.
# changed from 600 to 500 (12/17/2016)
# changed from 500 to 300 (02/01/2017)
F1TDC_WINDOW 300.
F1TDC_LATENCY 3600.
F1TDC_CLOCK 1
# LE discriminator
DSC2_WIDTH 20 40
DSC2_THRESHOLD 45 45
==========================
TAGM
==========================
FADC250_MODE 9
#FADC250_W_OFFSET 895
# FADC250_W_OFFSET 905
# Changed from 905 to 819 (12/15/16)
FADC250_W_OFFSET 890
# FADC250_W_WIDTH 100
#changed from 100 to 60 (12/17/2016)
FADC250_W_WIDTH 60
FADC250_NSB 3
FADC250_NSA 6
FADC250_NPEAK 3
FADC250_NSAT 2
# For low gain mode
#FADC250_READ_THR 115 #(early spring 2016)
#FADC250_READ_THR 250 # 4/9/16 aeb
#FADC250_READ_THR 115 # 2/4/17 by AEB, new fibers not yet calibrated
FADC250_READ_THR 150 # 1/14/18 by AEB/RTJ
# For high gain mode
#FADC250_READ_THR 180 #(change 3/30/2016 by RTJ)
#FADC250_READ_THR 140
#FADC250_READ_THR 200 # (new defaults 4/21/16 by AEB)
FADC250_TRIG_BL 100
#FADC250_TRIG_THR 210
#FADC250_TRIG_THR 400 # (new defaults 4/21/16 by AEB)
#FADC250_TRIG_THR 115 # (match read thr, 2/4/17 by AEB)
FADC250_TRIG_THR 150 # (match read thr, 1/14/18 by AEB/RTJ)
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 15
FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default
FADC250_COM_VER default
# FADC250_USER_DIR /gluex/CALIB/TAGM/fadc250/user/spring_2018
# FADC250_USER_VER spring_2018_v1
# New thresholds from Richard, 9/29/2018
# FADC250_USER_VER fall_2018_v1
# FADC250_USER_DIR /gluex/CALIB/TAGM/fadc250/user/spring_2019
# FADC250_USER_VER spring_2019_v1
# 12/10/2019
# FADC250_USER_DIR /gluex/CALIB/TAGM/fadc250/user/fall_2019
# FADC250_USER_VER fall_2019_v1
# 1/29/2020 - new constants for the spring 2020 run [rtj]
# FADC250_USER_DIR /gluex/CALIB/TAGM/fadc250/user/spring_2020
# FADC250_USER_VER spring_2020_v1
# Template for Richard (A.S. 08/30/22)
# FADC250_USER_DIR /gluex/CALIB/TAGM/fadc250/user/fall_2022
# FADC250_USER_VER fall_2022_v1
# 1/15/2023 - new constants for the winter 2023 run [rtj]
#FADC250_USER_DIR /gluex/CALIB/TAGM/fadc250/user/winter_2023
#FADC250_USER_VER winter_2023_v1
# 4/6/2025 - new constants for the spring 2025 run [rtj]
FADC250_USER_DIR /gluex/CALIB/TAGM/fadc250/user/spring_2025
FADC250_USER_VER spring_2025_v1
CTP_USE 0
# F1 TDC
# F1TDC_WINDOW 600.
# changed from 600 to 500 (12/17/2016)
# changed from 500 to 300 (02/01/2017)
F1TDC_WINDOW 300.
F1TDC_LATENCY 3600.
F1TDC_CLOCK 1
# LE discriminator
# Change for high gain mode
DSC2_WIDTH 20 40
#DSC2_THRESHOLD 20 20 (changed 2/10/16 by A.B.)
#DSC2_THRESHOLD 5 5 (changed for diamond alignment 2/20/16)
#DSC2_THRESHOLD 12 12
#DSC2_THRESHOLD 100 150 #(changed 3/30/2016 by RTJ)
#DSC2_THRESHOLD 80 80 #(new defaults 4/21/16 by AEB)
#DSC2_THRESHOLD 12 12 # 2/5/17 by AEB, new fiber calib not finished
#DSC2_COM_DIR /gluex/CALIB/ALL/dsc/default
#DSC2_COM_VER spring_2017_v3
# New thresholds from Richard, 1/17/2018
# New thresholds from Richard, 9/29/2018
# DSC2_COM_DIR /gluex/CALIB/ALL/dsc/spring-2018
# DSC2_COM_VER fall_2018_v1
# DSC2_COM_DIR /gluex/CALIB/ALL/dsc/spring-2019
# DSC2_COM_VER spring_2019_v1
# 12/10/2019
# DSC2_COM_DIR /gluex/CALIB/ALL/dsc/fall-2019
# DSC2_COM_VER fall_2019_v1
# 1/29/2020 - new constants for the spring 2020 run [rtj]
# DSC2_COM_DIR /gluex/CALIB/ALL/dsc/spring-2020
# DSC2_COM_VER spring_2020_v1
# Template for Richard (A.S. 08/30/22)
# DSC2_COM_DIR /gluex/CALIB/ALL/dsc/fall_2022
# DSC2_COM_VER fall_2022_v1
# 1/15/2023 - new constants for the winter 2023 run [rtj]
#DSC2_COM_DIR /gluex/CALIB/ALL/dsc/winter_2023
#DSC2_COM_VER winter_2023_v1
# 4/6/2025 - new constants for the spring 2025 run [rtj]
DSC2_COM_DIR /gluex/CALIB/ALL/dsc/spring_2025
DSC2_COM_VER spring_2025_v1
==========================
PS
==========================
FADC250_MODE 9
# FADC250_W_OFFSET 850
# Changed from 850 to 835 (12/15/16)
FADC250_W_OFFSET 835
# A.S. 1/27/2020 Reduce window width from 100 to 80
# FADC250_W_WIDTH 100
FADC250_W_WIDTH 80
FADC250_NSB 3
FADC250_NSA 10
FADC250_NPEAK 3
FADC250_READ_THR 130
FADC250_TRIG_BL 100
FADC250_TRIG_THR 200
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 15
FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default
FADC250_COM_VER default
FADC250_USER_DIR /home/somov/conf/cosmic
FADC250_USER_VER
==========================
PSC
==========================
FADC250_MODE 9
#FADC250_W_OFFSET 850
# Changed from 850 to 835 (12/15/16)
FADC250_W_OFFSET 835
FADC250_W_WIDTH 100
FADC250_NSB 3
FADC250_NSA 6
FADC250_NPEAK 3
FADC250_READ_THR 150
FADC250_TRIG_BL 100
FADC250_TRIG_THR 150
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 6
# F1 TDC
F1TDC_WINDOW 600
F1TDC_LATENCY 3540
F1TDC_CLOCK 1
# LE discriminator
DSC2_WIDTH 20 40
DSC2_THRESHOLD 40 40
==========================
TPOL
==========================
# change readout mode back to 10 (was 11) Jan31 15:19 by beni
FADC250_MODE 10
# Sebastian, Alex increase from 795 to 832 12/19/2017
FADC250_W_OFFSET 832
# Sebastian, Alex increase from 100 to 150 12/19/2017
FADC250_W_WIDTH 150
# Changed 01/23/18 Sebastian, Beni
#FADC250_W_WIDTH 500
#Switched back to 150 1/26/18
FADC250_NSB 3
FADC250_NSA 10
FADC250_NPEAK 1
# FADC250_READ_THR 133
# Changed 12/16/16
# FADC250_READ_THR 160
# Changed 02/04/17
# FADC250_READ_THR 150
# Changed 01/23/18 Sebastian, Beni
# FADC250_READ_THR 150
# Switched back to 150 1/26/18
# Switched back to 160 12/4/19, A.S. Mike's request
FADC250_READ_THR 160
# FADC250_READ_THR 4000
FADC250_TRIG_BL 100
FADC250_TRIG_THR 500
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 6
==========================
CDC
==========================
# CDC_short 3
# CDC_long 6
# FDC_short 4
# FDC_amp_short 5
# FDC_sum_long 7
# FDC_amp_long 8
# Modes 3 and 6: IE = 200 and ABIT = 3
# Modes 5 and 8: IE = 10 and ABIT = 0
# Default read out mode before 02/25/2018
# FADC125_MODE 5
# New read out mode requested by Naomi on 02/25/2018
FADC125_MODE 3
# FADC125_W_OFFSET 425
# FADC125_W_OFFSET 415
# Production 2018 02/23/18
#FADC125_W_OFFSET 438
# Lyubomit Tests 02/23/18
FADC125_W_OFFSET 418
# Default window size 02/25/2018
FADC125_W_WIDTH 200
# Modified by Naomi's request 02/25/2015
# FADC125_W_WIDTH 174
# Changed by Naomi from 200 to 10 on 12/21/17
# FADC125_IE 10
# New value requested by Naomi on 02/25/2018
FADC125_IE 200
FADC125_NPEAK 1
FADC125_PG 4
FADC125_P1 4
FADC125_P2 4
FADC125_IBIT 4
# FADC125_ABIT 0
# New value requested by Naomi on 02/25/2018
FADC125_ABIT 3
FADC125_PBIT 0
FADC125_TH 50
FADC125_TL 10
FADC125_THR 500
FADC125_DAC 800
#FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/default
#FADC125_COM_VER default
# FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2017
# FADC125_COM_VER fall2017C
# New calibration from Beni 11/22/2017 Naomi's thresholds 12/18/2017
# FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2017
# FADC125_COM_VER spring18
# New thresholds from Naomi 2/2/2018
# FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2017
# FADC125_COM_VER spring2018_B
# New thresholds from Naomi 3/27/2018
# FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2017
# FADC125_COM_VER spring2018_D
# file for threshold scans
# FADC125_COM_VER spring18_TH160
# New calibration from Beni
# FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2018
# FADC125_COM_VER fall18_B
# New calibration from Beni 2019/10/24
# FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2019
# FADC125_COM_VER summer20_B
# New calibration from Beni 2022/08/22
#FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2022
#FADC125_COM_VER fall22
FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/winter2025
FADC125_COM_VER winter25I
FADC125_USER_DIR /gluex/
FADC125_USER_VER
==========================
FDC
==========================
# CDC_short 3
# CDC_long 6
# FDC_short 4
# FDC_amp_short 5
# FDC_sum_long 7
# FDC_amp_long 8
FADC125_MODE 5
# FADC125_W_OFFSET 425
# FADC125_W_OFFSET 411
# FADC125_W_OFFSET 434
# Changed from 434 to 414 => SF: 414 is OK,see RUN 22012 Sun Dec 18 02:02:32 EST 2016
FADC125_W_OFFSET 414
FADC125_W_WIDTH 80
FADC125_IE 16
FADC125_NPEAK 1
FADC125_PG 4
FADC125_P1 4
FADC125_P2 4
FADC125_IBIT 4
FADC125_ABIT 0
FADC125_PBIT 0
FADC125_TH 40
FADC125_TL 10
FADC125_THR 70
FADC125_DAC 800
# New calibration from Beni 11/22/2017
# FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2017
# FADC125_COM_VER spring2018_D
# New calibration from Beni 8/01/2018
# FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2018
# FADC125_COM_VER fall18_B
# New calibration from Beni 2019/10/24
# FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/fall2019
# FADC125_COM_VER summer20
# New calibration from Beni 2022/05/13
#FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/summer2022
#FADC125_COM_VER summer22
FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/default
FADC125_COM_VER default
FADC125_USER_DIR /gluex/
FADC125_USER_VER
# F1 TDC
# change latency and window back to what we expect from ADCs (Beni)
# F1TDC_WINDOW 1400.
# F1TDC_LATENCY 3560.
F1TDC_WINDOW 600.
F1TDC_LATENCY 3360.
# High-resolution board in slot 17
# changed by Beni (loser) 2014.10.6
F1TDC_HR_WINDOW 1000.
F1TDC_HR_LATENCY 1160.
# set bin size from 0.056 to 0.058 -> Beni!
#F1TDC_HR_BIN_SIZE 0.058
F1TDC_CLOCK 1
==========================
CCAL
==========================
FADC250_MODE 9
FADC250_W_OFFSET 805
#FADC250_W_OFFSET 900
FADC250_W_WIDTH 100
FADC250_NSB 1
FADC250_NSA 15
FADC250_NPEAK 3
FADC250_NSAT 2
FADC250_READ_THR 108
FADC250_TRIG_BL 100
#FADC250_TRIG_THR 200 Originally used for CCAL
FADC250_TRIG_THR 130
# Test Rate A.S
# FADC250_TRIG_THR 110
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 15
FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default
FADC250_COM_VER default
FADC250_USER_DIR /gluonfs1/gluex/CALIB/FCAL/fadc250/user/spring_2018
FADC250_USER_VER
# Configuration of CCAL reference PMTs
FADC250_MODE_REF 10
FADC250_W_OFFSET_REF 805
FADC250_W_WIDTH_REF 100
FADC250_READ_THR_REF 150
==========================
DIRC
==========================
# SSP_FIBER_W_WIDTH 500
# SSP_FIBER_W_OFFSET 3550
# 12/18/2019
#SSP_FIBER_W_WIDTH 300
#SSP_FIBER_W_OFFSET 3500
# 12/19/2019
# SSP_FIBER_W_WIDTH 400
# 1/16/2023
#SSP_FIBER_W_WIDTH 400
# 4/10/2025
SSP_FIBER_W_OFFSET 3650
SSP_FIBER_W_WIDTH 550
SSP_REG_GLOBAL0 0x69306B87
SSP_REG_GLOBAL1 0x0
SSP_MAROC_REG_DAC0 400
SSP_MAROC_REG_DAC1 0
SSP_MAROC_REG_GAIN_0_15 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64
SSP_MAROC_REG_GAIN_16_31 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64
SSP_MAROC_REG_GAIN_32_47 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64
SSP_MAROC_REG_GAIN_48_63 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64
SSP_MAROC_REG_SUM 0x00000000 0x00000000
SSP_MAROC_REG_MASKOR 0x00000000 0x00000000
SSP_TDC_ENABLE 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF
# Charge injection
# SSP_CTEST_ENABLE 0
# SSP_CTEST_DAC 1000
# SSP_PULSER 1000000
# SSP_MAROC_REG_CTEST 0x00000000 0x00000000
# Charge injection
SSP_CTEST_ENABLE 0
SSP_CTEST_DAC 1000
SSP_PULSER 500000
SSP_MAROC_REG_CTEST 0x11111111 0x11111111
SSP_COM_DIR /gluex/CALIB/ALL/ssp/default
SSP_COM_VER equalizeVer1_DAC100_Pedestal120860
# Configuration of the Reference SiPM
# FADC settings
FADC250_MODE 9
FADC250_W_OFFSET 805
FADC250_W_WIDTH 100
FADC250_READ_THR 105
FADC250_TRIG_THR 105
DSC2_THRESHOLD 10 10
==========================
GEMTRD
==========================
# CDC_short 3
# CDC_long 6
# FDC_short 4
# FDC_amp_short 5
# FDC_sum_long 7
# FDC_amp_long 8
FADC125_MODE 5
#FADC125_W_OFFSET 500
#FADC125_W_WIDTH 300
#FADC125_W_OFFSET 414
FADC125_W_OFFSET 400
FADC125_W_WIDTH 160
FADC125_IE 200
FADC125_NPEAK 15
FADC125_PG 4
FADC125_P1 4
FADC125_P2 4
FADC125_IBIT 4
FADC125_ABIT 0
FADC125_PBIT 0
FADC125_TH 30
FADC125_TL 15
FADC125_THR 10
FADC125_DAC 36864
FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/default
FADC125_COM_VER default
FADC125_USER_DIR /gluex/
FADC125_USER_VER
USE_GEM 0