Content:
#! Run type:: PULSER Config:: TRG_PULSER_raw_b1.conf
#! OUTPUT NAME:: /home/hdops/CDAQ/daq_dev_v0.31/daq/config/hd_all/TRG_PULSER_raw_b1.conf
#! (Re)Created:: on Tue Jun 28 11:26:50 EDT 2016
#!
# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)
# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)
#
# TS_TRIG_TYPE 1 - Internal Pulser
# 2 - External FP
# 4 - GTP
# 6 - GTP + External
#
#
# TS_FP_INPUTS - List of enabled FP inputs
#
#
# TS_SOFT_TRIG
# Trigger type (type 1 or 2 for playback)
# Number of events to trigger
# Period multiplier (depends on range 0-0x7FFF)
# Range 1 - min 120ns, increments of 30ns up to 983.13u
# 2 - min 120ns, increments of 30.72us up to 1.007s
#
#
# TI_MASTER 1 - Stand alone with master TI
#
# TI_MASTER_TRIG 1 - soft, 2 - external pulser, 3 - playback
#
# TI_SOFT_TRIG
# Trigger type (type 1 or 2 for playback)
# Number of events to trigger
# Period multiplier (depends on range 0-0x7FFF)
# Range 1 - min 120ns, increments of 30ns up to 983.13u
# 2 - min 120ns, increments of 30.72us up to 1.007s
#
# F1TDC_CLOCK 0 <- Clock Source (0 = Internal 32 MHz)
# (1 = External 31.25 MHz)
# F1TDC_VERSION 2 <- Module Version (2 = High Resolution, synchronous, 32 channels)
# (3 = Normal Resolution, synchronous, 48 channels)
# set bin size from 0.056 to 0.058 -> Beni!
# F1TDC_BIN_SIZE 0.058 <- Bin size (ns)
# F1TDC_LATENCY 3000.0 <- Trigger latency (ns)
# F1TDC_WINDOW 1000.0 <- Trigger window (ns)
==========================
TRIGGER
==========================
CALIBRATION 0
TS_TRIG_TYPE 2
TS_FP_INPUTS 4
# random 256 kHz
#TS_SOFT_TRIG 1 64000 1 2
#TS_SOFT_TRIG 1 555 0x4FFF 1
#TS_SOFT_TRIG 1 64000 0x1FF 1
TS_TD_SLOTS 4 14
# SSP SLOT FIBER_EN SUM_ENABLE
SSP_SLOT 8 0xFF 1
# TYPE DELAY INT_WIDTH ENABLE
TRIG_EQ PS 20 10 0
TRIG_EQ BCAL_E 20 20 1
TRIG_EQ BCAL_C 20 10 0
TRIG_EQ FCAL 20 10 0
TRIG_EQ ST 20 10 0
TRIG_EQ TOF 20 10 0
# TYPE LATENCY WIDTH FCAL_E BCAL_E EN_THR NHIT LANE
TRIG_TYPE PS 420 20 1300 1900 1100 0 -1
TRIG_TYPE BFCAL 452 20 0 1 2000 0 0
TRIG_TYPE BCAL_COS 440 40 1500 2100 1300 0 -1
#TS_GTP_PRES 0 1
TS_TRIG_HOLD 1 5 1
TRIG_DELAY 0
DAC_CALIB 0
TI_FIBER_LATENCY_OFFSET 0x98
TI_MASTER 0
TI_MASTER_TRIG 1
TI_FP_INPUTS 3
# TI_SOFT_TRIG 1 10000 0x7FFF 1
TI_SOFT_TRIG 1 10000 0x600 1
TI_FIBER_EN
TS_SYNC_INT 50000
#BLOCKLEVEL 1
#BUFFERLEVEL 1
BLOCKLEVEL 40
BUFFERLEVEL 5
==========================
GLOBAL
==========================
F1TDC_BIN_SIZE 0.058
-------------------------------------------------------------------
# use file:: -rw-rw-r-- 1 hdops hdops 712 Apr 21 14:17 /home/hdops/CDAQ/daq_dev_v0.31/daq/config/hd_all/master_config/CDC.master
==========================
CDC
==========================
# FADC125_MODE can be:
# 3 = CDC_short 6 = CDC_long
# 4 = FDC_short 7 = FDC_sum_long
# 5 = FDC_amp_short 8 = FDC_amp_long
FADC125_MODE 3
FADC125_W_OFFSET 425
FADC125_W_WIDTH 200
FADC125_IE 200
FADC125_NPEAK 1
FADC125_PG 4
FADC125_P1 4
FADC125_P2 4
FADC125_IBIT 4
FADC125_ABIT 3
FADC125_PBIT 0
FADC125_TH 90
FADC125_TL 25
FADC125_THR 500
FADC125_DAC 800
FADC125_COM_DIR /gluex/CALIB/ALL/fadc125/default
FADC125_COM_VER default
FADC125_USER_DIR /gluex/
FADC125_USER_VER
==========================
TOF
==========================
# change latency and width from 510/200 to 910/100
# and change NSB and NSA from 3/6 to 5/20
# btw. it is BENI
# changed NSB & NSA from 5/20 to 10/45 (eugenio)
FADC250_MODE 8
FADC250_W_OFFSET 810
FADC250_W_WIDTH 80
FADC250_NSB 1
FADC250_NSA 25
FADC250_NPEAK 3
FADC250_READ_THR 111
FADC250_TRIG_BL 100
FADC250_TRIG_THR 110
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 15
FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default
FADC250_COM_VER default
FADC250_USER_DIR /home/
FADC250_USER_VER
# CTP_BCAL_THR 56000
# LE discriminator
DSC2_WIDTH 20 40
DSC2_THRESHOLD 30 50
# CAEN 1290
#TDC1290_W_WIDTH 750
TDC1290_W_WIDTH 3800
#TDC1290_W_OFFSET -1750
#TDC1290_W_OFFSET -3640
TDC1290_W_OFFSET -3660
TDC1290_W_EXTRA 25
TDC1290_W_REJECT 50
TDC1290_BLT_EVENTS 1
TDC1290_N_HITS 64
TDC1290_ALMOSTFULL 16384
TDC1290_OUT_PROG 2
TDC1290_A24_A32 2
TDC1290_SNGL_BLT 3
TDC1290_SST_RATE 0
TDC1290_BERR_FIFO 1
TDC1290_EDGE 2
==========================
BCAL
==========================
FADC250_MODE 10
# Changed FADC250_W_OFFSET=315->205 (elton 9/23/2016)
FADC250_W_OFFSET 205
FADC250_W_WIDTH 100
FADC250_NSB 3
FADC250_NSA 50
FADC250_NPEAK 1
FADC250_READ_THR 110
FADC250_TRIG_BL 100
FADC250_TRIG_THR 110
FADC250_TRIG_NSB 3
FADC250_TRIG_NSA 15
FADC250_COM_DIR /gluex/CALIB/ALL/fadc250/default
FADC250_COM_VER default
FADC250_USER_DIR /home/
FADC250_USER_VER
# F1 TDC
F1TDC_WINDOW 500.
F1TDC_LATENCY 900.
F1TDC_BIN_SIZE 0.058
F1TDC_CLOCK 1
# LE discriminator
DSC2_WIDTH 40 40
DSC2_THRESHOLD 35 50