FA125 Data Format July 7, 2015
Location and Time
Room: CC F326???
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- Previous meeting (June 23, 2015)
- Status of FADC125 Firmware
- Proposed field range for configuration parameters - from email and last week's minutes
- Data type list
- 0: block header
- 1: block trailer
- 2: event header
- 3: trigger time
- 4: pulse data, CDC format
- 5: pulse data, FDC format (integral and time)
- 6: pulse data, FDC format (peak amplitude and time)
- 7: pulse data and raw samples, CDC format
- 8: pulse data and raw samples, FDC format
- 9 to 12: – unused –
- 13: event trailer (debug only)
- 14: data not valid (empty module)
- 15: filler (non-data) word
- ADC modes (pdf)
- Integration starts with sample containing leading edge time
- IE = end of integration, number of samples included, starting with pulse leading edge. The integral ends at the earlier of WE or leading edge + IE.
- Leading edge sample is int(t/10.0) where t=time returned in units of sample/10.
- If int(t/10.0) <= WE-IE, then the number of samples in the integral is IE.
- If int(t/10.0) > WE-IE, then the number of samples in the integral is WE-int(t/10.0)+1.
- IE=14 WE=44 t=425, integral runs from samples 42 to 44 inclusive, 3 samples.
- IE=14 WE=44 t=225, integral runs from samples 22 to 22+14=36 inclusive, 15 samples.
- IE=14 WE=44 t=210, integral runs from samples 21 to 21+14=35 inclusive, 15 samples.
- IE=200 WE=100 t=425, integral runs from samples 42 to 100 inclusive, 59 samples.
- IE=200 WE=100 t=990, integral runs from samples 99 to 100 inclusive, 2 samples.
- Time algorithm error conditions (overflow samples are now set to 4095 and then treated normally)
- ADC value of 0 anywhere in NSAMPLES buffer: q=1, t=10*TC-RT
- ADC value > LIMIT_PED_MAX (511) in 0 to PED_SAMPLE: q=1, t=10*TC-RT
- All ADC values in buffer < high timing threshold: q=1, t=10*TC-RT
- Low timing threshold found between samples TCL and TCL+1 but too late in buffer to upsample: q=1, t=10*TCL+5
- Low timing threshold found between samples TCL and TCL+1 but any upsampled value < 0: q=1, t=10*TCL+5
- Low timing threshold found between samples TCL and TCL+1 but not found in upsampled data: q=1, t=10*TCL+9
- Suggestion: instead of returning 10*TC-RT for error conditions 1-3 above, how about 10*TC-29 for #1, 10*TC-28 for #2, 10*TC-27 for #3?
- Format doc version 5.06, 23 June 2015
- Timing algorithm wiki page - updated to include latest revisions
- fADC125 Data Format Specification Document in svn (old)
- Data format for 250 modes on fADC125 from Cody, Aug 15 2014
- FA250 modes 2 from Ed and Hai, Feb 18 2014
- FIRMWARE for FADC250 Ver2 ADC FPGA, Sept 2014?
- CDC readout needs Garfield calcs
- CDC_run_985 CDC_run_970
- Version 5.03, 11 March 2015
- Ver 5.01 in svn, 17 Feb 2015
Present: Naomi (CMU), Cody, Beni (JLab)
- FA125 status: Cody received the new module from Naomi yesterday and is working to fit it into with the rest of the firmware, at present in simulation. The integration now takes place outside the timing module. The timing module was modified to output the number of the sample containing the leading edge as soon as this is found, so that the integration can start while the timing module is working on upsampling to find the pulse time more accurately. Naomi will send Cody the new results for some test signals.
- Configuration parameter range: We are asking for any modifications to the proposed range to be provided by the end of this week. After then, Cody will start working them into the firmware and send them to Bryan for the driver.
- Data types: The list has been consolidated with the unused types moved to the end (see the meeting agenda).
- ADC modes: We had a brief discussion about the proposed mode names in ADC modes (pdf). Cody will talk to Bryan to find out if this is workable and if he has any other suggestions. The main aim is to avoid confusion between ourselves and between the FA125 and FA250 modes.
- Integration: the new meaning of parameter IE is the count of samples in the integration, starting with the pulse leading edge, and not the original hit threshold crossing. Integration stops when either IE samples have been summed, or sample WE is reached. Some examples are given in the meeting agenda.
- Error codes: We are not sure how useful it would be to be able to identify the different error cases offline, but giving them a unique error code is harmless and might be useful later. We changed the proposed amendment to the following
- ADC value of 0 anywhere in NSAMPLES buffer: q=1, t=10*TC-29 (time ends in 1)
- ADC value > LIMIT_PED_MAX (511) in 0 to PED_SAMPLE: q=1, t=10*TC-28 (time ends in 2)
- All ADC values in buffer < high timing threshold: q=1, t=10*TC-27 (time ends in 3)
- Low timing threshold found between samples TCL and TCL+1 but too late in buffer to upsample: q=1, t=10*TCL+4 (time ends in 4)
- Low timing threshold found between samples TCL and TCL+1 but any upsampled value < 0: q=1, t=10*TCL+5 (time ends in 5)
- Low timing threshold found between samples TCL and TCL+1 but not found in upsampled data: q=1, t=10*TCL+9 (time ends in 9)
- Diagrams: Naomi will update the 2nd and 3rd figs in the following plot to include in the file spec.