July 13, 2015

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  • Addendum to specifications for fadc250 firmware
  • Trigger path
- Energy transfer
Fix Nsb to 5
- Hit-bit pattern
Trigger threshold - no pedestal subtraction for both energy and hit-bit (firmware version 90E)
  • Read out path (scintillator sub-detectors, PS/PSC, TAGM, )
  • Pedestals
- Report the sum of N samples ( N = 4, 8, 16) computed at the beginning of the readout window
- Number of samples N - programmable
- Energy range 0 - 255, report 0xFF if underflow or overflow occures. The number of bits required - 8 + 4 = 12
  • - Fix NSb to 5
  • Scalers
- Report the sum of pedestals (read out through registers)


  • FCAL MIPs efficiency
- Track radius
- FCAL energy
  • Adjusting pedestals during the run (pedestal stability check)
  • Implementing trigger scalers (gtp, ssp, )
- add scalers to the data stream
  • Hardware/trigger performance during the beam test
- Reproduce trigger thresholds with recorded data (features with FCAL ST algorithm)
additional checks in read out lists
- Non-uniform occupancies with TOF trigger
- use PlayBack for comprehensive system checks.
High-rate performance checking