Difference between revisions of "Minutes-4-14-2016"

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- Lubomir proposed  
 
- Lubomir proposed  
  
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== fADC125 ==
 
== fADC125 ==
  
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- The CDC & FDC crates are using the firmware version 2_00_F_3 but the DAQ still has the older driver library on it.  The new firmware has some improvements made by Cody in the compilation.  As previously, the pedestal output is the integrated pedestal (sum of 2**P2 samples), right-shifted by (P2+PBIT).  The new firmware allows PBIT to have integer values from 3 down to -P2, so the possible output values for pedestal now include the mean scaled by 1/8 (PBIT=3), the mean (PBIT=0), and the integral (PBIT=-P2).  Other scaling factors can be obtained using different PBIT values.  Previous versions of the firmware and driver use PBIT >=0. This change was made because Lubomir had been expecting the firmware to output the integrated pedestal instead of the mean.  Using PBIT=-P2 permits this while requiring no changes to the offline code.  We need to remind Sergey to update the library. 
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- Naomi is still looking at the differences between firmware and emulated output using the long mode (8) cosmic runs.
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* Run 11016 2 CDC fadcs were playing up: roc25 slot 9, even ch 36-40 and roc28 slot 16, even ch 36-40 - there were small errors in 4/5 of hits.
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FDC fadcs are ok
  
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- Cody suspected that some of the timing errors that we are seeing in the fa125 long mode data are due to triggers arriving too frequently. We thought that bufferlevel=1 would restrict the triggers so that only one trigger was sent to the fa125 at a time, but this turned out to be untrue, the value in the configuration file is only a place-holder and the true value is a constant 4. Beni increased the trigger holdoff from 15us to 30us and the number of timing errors halved. Naomi asked Sascha to recompile the CODA readout list with bufferlevel=1 and we took cosmic run 11075. After this, the readout list was recompiled with bufferlevel=4 as before.  The timing errors in run 11075 are almost entirely from 6 channels, numbers 36,38,40 in two fadc modules (roc25 slot 9 and roc28 slot 16). We have not found any logic errors in the firmware.
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* run 11017 Both CDC & FDC ok.   (trigger holdoff increased to 30us)
  
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- Sascha offered to make bufferlevel into a real parameter, we should take him up on this.  We also mentioned the possibility of using the busy signal from the fa125 as a trigger inhibit, this should be more efficient in short mode, but this seems further back in Sascha's to-do list, as it is part of a larger makeover to do this for ALL the modules.
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* run 11075  CDC fadcs playing up, roc25 slot 9 even ch 36-40 and roc28 slot 16 even ch 36-40
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                FDC roc62 slot 17 even ch 36-42 show same behaviour
  
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- Cody made the raw data output more robust in version 2_00_E, it turned out to be bufferlevel=4 causing the trouble with repeated raw data words, this was the clue that the triggers might be arriving too close together.  We have not seen any more repeated raw data words since then, although there are very occasional errors (one per run) with channel number mismatch between pulse and window data.
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* noticed that info in BOR config data read from fadcs is corrupt for these 3 boards, ch 36-41.
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read problem w chip?
  
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- Lubomir estimated the timing algorithm  resolution by comparing it with the TDC time from the wires. The TDC counts were taken w.r.t. to the trigger time as recorded by the f125 to eliminate the trigger jitter. For TH=100 and TL=25 we get 6ns resolutions for big signals (>600 fADC unist) and 8ns for amplitudes <600. From the plot one can see that a time-walk correction would improve the resolution there. For TH=50 and TL=12 the resolutions are much worse (>12ns). These are combined fADC/TDC resolutions, but the assumption is that the TDC contribution is smaller.
 
  
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if it was a write problem, the discrepancies would be larger.  (emulator uses read back values & has larger diffs).
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diffs are ~ 1 in time and 5-7 in (scaled down) integral.

Revision as of 13:45, 18 April 2016

April 14, 2016 Drift Chamber meeting

Connection

  1. Instructions for Bluejeans meeting connection
  2. Meeting ID: 290664653
  3. To join via a Web Browser, go to the page [1] https://bluejeans.com/290664653.

Agenda

  1. Detector updates
  2. Electronics (Fernando, Chris, Nick)
  3. NIM Papers
  4. fADC125 meeting (Naomi, Cody, Beni)
  5. Other

Minutes

Participants: Curtis, Naomi, Mike (CMU) Eugene, Fernando, Beni, Luke, Simon, Nick, Chris, Vlad, Sergey, Amanda (detector group), Tyler (detector group), Pablo (detector group), and Lubomir (JLab).

Detector updates

- CDC has been successfully fixed after the "near-miss" event. The card that Nick suspected for noise was tested with a scope and was OK. Fernando: "the electronics saved the day" (i.e. the detector).

- Vlad reported on the FDC gain calibration. He did this before, but now the cathode resolution was improved and he uses now higher statistics (~1M hits per chamber). In the attached plots we see the distribution of the gain coefficients is getting narrower with each iteration - 4 in total. Some channels tend not to be calibrated producing tails in the distributions. Vlad will also work on parallelizing the calculations: separate job for each chamber.

- Lubomir proposed


fADC125

- Naomi is still looking at the differences between firmware and emulated output using the long mode (8) cosmic runs.

  • Run 11016 2 CDC fadcs were playing up: roc25 slot 9, even ch 36-40 and roc28 slot 16, even ch 36-40 - there were small errors in 4/5 of hits.

FDC fadcs are ok

  • run 11017 Both CDC & FDC ok. (trigger holdoff increased to 30us)
  • run 11075 CDC fadcs playing up, roc25 slot 9 even ch 36-40 and roc28 slot 16 even ch 36-40
               FDC roc62 slot 17 even ch 36-42 show same behaviour
  • noticed that info in BOR config data read from fadcs is corrupt for these 3 boards, ch 36-41.

read problem w chip?


if it was a write problem, the discrepancies would be larger. (emulator uses read back values & has larger diffs). diffs are ~ 1 in time and 5-7 in (scaled down) integral.

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